Silicon CMOS architecture for a spin-based quantum computer

Abstract

Recent advances in quantum error correction (QEC) codes for fault-tolerant quantum computing \cite{Terhal2015} and physical realizations of high-fidelity qubits in a broad range of platforms \cite{Kok2007, Brown2011, Barends2014, Waldherr2014, Dolde2014, Muhonen2014, Veldhorst2014} give promise for the construction of a quantum computer based on millions of interacting qubits. However, the classical-quantum interface remains a nascent field of exploration. Here, we propose an architecture for a silicon-based quantum computer processor based entirely on complementary metal-oxide-semiconductor (CMOS) technology, which is the basis for all modern processor chips. We show how a transistor-based control circuit together with charge-storage electrodes can be used to operate a dense and scalable two-dimensional qubit system. The qubits are defined by the spin states of a single electron confined in a quantum dot, coupled via exchange interactions, controlled using a microwave cavity, and measured via gate-based dispersive readout \cite{Colless2013}. This system, based entirely on available technology and existing components, is compatible with general surface code quantum error correction \cite{Terhal2015}, enabling large-scale universal quantum computation.

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• Surface codes: Towards practical large-scale quantum computation
• Single-shot read-out of an individual electron spin in a quantum dot
• An addressable quantum dot qubit with fault-tolerant control fidelity
• Circuit Quantum Electrodynamics with a Spin Qubit
• Quantum and Tunnelling Capacitance in Charge and Spin Qubits
• A Radio Frequency Charge Parity Meter

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