A sparse spin qubit array with integrated control electronics
arXiv:1912.06461 · doi:10.1109/IEDM19573.2019.8993570
Abstract
Current implementations of quantum computers suffer from large numbers of control lines per qubit, becoming unmanageable with system scale up. Here, we discuss a sparse spin-qubit architecture featuring integrated control electronics significantly reducing the off-chip wire count. This quantum-classical hardware integration closes the feasibility gap towards a CMOS quantum computer.
arXiv commentPaper accompanying an invited talk at the 2019 IEEE International Electron Devices Meeting (IEDM), December 7-11, 2019
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