Towards early fault tolerance on a 2$\times$N array of qubits equipped with shuttling

Abstract

It is well understood that a two-dimensional grid of locally-interacting qubits is a promising platform for achieving fault tolerant quantum computing. However in the near-future, it may prove less challenging to develop lower dimensional structures. In this paper, we show that such constrained architectures can also support fault tolerance; specifically we explore a 2$\times$N array of qubits where the interactions between non-neighbouring qubits are enabled by shuttling the logical information along the rows of the array. Despite the apparent constraints of this setup, we demonstrate that error correction is possible and identify the classes of codes that are naturally suited to this platform. Focusing on silicon spin qubits as a practical example of qubits believed to meet our requirements, we provide a protocol for achieving full universal quantum computation with the surface code, while also addressing the additional constraints that are specific to a silicon spin qubit device. Through numerical simulations, we evaluate the performance of this architecture using a realistic noise model, demonstrating that both surface code and more complex qLDPC codes efficiently suppress gate and shuttling noise to a level that allows for the execution of quantum algorithms within the classically intractable regime. This work thus brings us one step closer to the execution of quantum algorithms that outperform classical machines.

18 pages, 12 figures

References in corpus (27)

• Surface codes: Towards practical large-scale quantum computation
• Logical quantum processor based on reconfigurable atom arrays
• An addressable quantum dot qubit with fault-tolerant control fidelity
• Semiconductor Spin Qubits
• Topological fault-tolerance in cluster state quantum computation
• Computing with spin qubits at the surface code error threshold
• Fast universal quantum control above the fault-tolerance threshold in silicon
• High-threshold and low-overhead fault-tolerant quantum memory
• Universal control of a six-qubit quantum processor in silicon
• Exponential suppression of bit or phase flip errors with repetitive error correction
• Two-qubit silicon quantum processor with operation fidelity exceeding 99%
• CMOS-based cryogenic control of silicon quantum circuits
• Low-distance Surface Codes under Realistic Quantum Noise
• Scaling silicon-based quantum computing using CMOS technology: State-of-the-art, Challenges and Perspectives
• A hole spin qubit in a fin field-effect transistor above 4 kelvin
• Quantum error correction with silicon spin qubits
• Rapid high-fidelity gate-based spin read-out in silicon
• Coherent spin qubit transport in silicon
• Conveyor-mode single-electron shuttling in Si/SiGe for a scalable quantum computing architecture
• A magic state's fidelity can be superior to the operations that created it
• Blueprint of a scalable spin qubit shuttle device for coherent mid-range qubit transfer in disordered Si/SiGe/SiO${}_2$
• Single-electron spin resonance in a nanoelectronic device using a global field
• Improved single-shot decoding of higher dimensional hypergraph product codes
• Rapid single-shot parity spin readout in a silicon double quantum dot with fidelity exceeding 99 %
• Looped Pipelines Enabling Effective 3D Qubit Lattices in a Strictly 2D Device
• Bounds to electron spin qubit variability for scalable CMOS architectures
• High-fidelity spin qubit shuttling via large spin-orbit interaction

Cited by in corpus (9)

• A 300 mm foundry silicon spin qubit unit cell exceeding 99% fidelity in all operations
• Near-Term Spin-Qubit Architecture Design via Multipartite Maximally-Entangled States
• A 2x2 quantum dot array in silicon with fully tuneable pairwise interdot coupling
• Erasure conversion for singlet-triplet spin qubits enables high-performance shuttling-based quantum error correction
• Interplay of Zeeman Splitting and Tunnel Coupling in Coherent Spin Qubit Shuttling
• Comparison of spin-qubit architectures for quantum error-correcting codes
• Coupling a ${}^{73}$Ge nuclear spin to an electrostatically defined quantum dot
• Spin qubit shuttling between coupled quantum dots with inhomogeneous Landé g-tensors
• Digital-Controlled Method of Conveyor-Belt Spin Shuttling in Silicon for Large-Scale Quantum Computation