Spin readout of a CMOS quantum dot by gate reflectometry and spin-dependent tunnelling

Abstract

Silicon spin qubits are promising candidates for realising large scale quantum processors, benefitting from a magnetically quiet host material and the prospects of leveraging the mature silicon device fabrication industry. We report the measurement of an electron spin in a singly-occupied gate-defined quantum dot, fabricated using CMOS compatible processes at the 300 mm wafer scale. For readout, we employ spin-dependent tunneling combined with a low-footprint single-lead quantum dot charge sensor, measured using radiofrequency gate reflectometry. We demonstrate spin readout in two devices using this technique, obtaining valley splittings in the range 0.5-0.7 meV using excited state spectroscopy, and measure a maximum electron spin relaxation time ($T_1$) of $9\pm 3$ s at 1 Tesla. These long lifetimes indicate the silicon nanowire geometry and fabrication processes employed here show a great deal of promise for qubit devices, while the spin-readout method demonstrated here is well-suited to a variety of scalable architectures.

arXiv comment8 pages, 4 figures, 57 cites. v3: added acknowledges

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Cited by in corpus (30)

• Semiconductor Spin Qubits
• Qubits made by advanced semiconductor manufacturing
• Scaling silicon-based quantum computing using CMOS technology: State-of-the-art, Challenges and Perspectives
• Review of performance metrics of spin qubits in gated semiconducting nanostructures
• Probing quantum devices with radio-frequency reflectometry
• Single-electron control in a foundry-fabricated two-dimensional qubit array
• Blueprint of a scalable spin qubit shuttle device for coherent mid-range qubit transfer in disordered Si/SiGe/SiO${}_2$
• Fast and high-fidelity state preparation and measurement in triple-quantum-dot spin qubits
• Single-shot readout in graphene quantum dots
• Large dispersive interaction between a CMOS double quantum dot and microwave photons
• Variability of electron and hole spin qubits due to interface roughness and charge traps
• Superconducting routing platform for large-scale integration of quantum technologies
• Beating the thermal limit of qubit initialization with a Bayesian Maxwell's demon
• Single-shot readout of multiple donor electron spins with a gate-based sensor
• Multi-module microwave assembly for fast read-out and charge noise characterization of silicon quantum dots
• Non-reciprocal Pauli Spin Blockade in a Silicon Double Quantum Dot
• Optimizing nonadiabatic geometric quantum gates against off-resonance error by dynamical correction in a silicon-based spin qubit
• Fast high-fidelity geometric gates for singlet-triplet qubits
• Improved Single-Shot Qubit Readout Using Twin RF-SET Charge Correlations
• Gate reflectometry in dense quantum dot arrays
• An elongated quantum dot as a distributed charge sensor
• Leveraging Off-the-Shelf Silicon Chips for Quantum Computing
• Triple-top-gate technique for studying the strongly interacting 2D electron systems in heterostructures
• Controlled-NOT gate based on the Rydberg states of surface electrons
• Probing the Atomic Arrangement of Sub-Surface Dopants in a Silicon Quantum Device Platform
• Protecting coherence from the environment via Stark many-body localization in a Quantum-Dot Simulator
• Transport in Single Quantum Dots: A Review from Linear Response to Nonlinear Regimes
• Universal singlet-triplet qubits implemented near the transverse sweet spot
• Robust iSWAP gates for semiconductor spin qubits with local driving
• Four-state discrimination for a pair of spin qubits via gate reflectometry