High-Mobility Holes in Dual-Gated WSe${}_2$ Field-Effect Transistors

Abstract

We demonstrate dual-gated $p$-type field-effect transistors (FETs) based on few-layer tungsten diselenide (WSe${}_2$) using high work-function platinum source/drain contacts, and a hexagonal boron nitride top-gate dielectric. A device topology with contacts underneath the WSe${}_2$ results in $p$-FETs with $I_{ON}$/$I_{OFF}$ ratios exceeding 10${}^7$, and contacts that remain Ohmic down to cryogenic temperatures. The output characteristics show current saturation and gate tunable negative differential resistance. The devices show intrinsic hole mobilities around 140 cm${}^2$/Vs at room temperature, and approaching 4,000 cm${}^2$/Vs at 2 K. Temperature-dependent transport measurements show a metal-insulator transition, with an insulating phase at low densities, and a metallic phase at high densities. The mobility shows a strong temperature dependence consistent with phonon scattering, and saturates at low temperatures, possibly limited by Coulomb scattering, or defects.

18 pages, 5 figures, 7 supporting figures, ACS Nano 2015

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