Hall and field-effect mobilities in few layered -WSe field-effect transistors
arXiv:1502.00335 · doi:10.1038/srep08979
Abstract
Here, we present a temperature () dependent comparison between field-effect and Hall mobilities in field-effect transistors based on few-layered WSe exfoliated onto SiO. Without dielectric engineering and beyond a -dependent threshold gate-voltage, we observe maximum hole mobilities approaching 350 cm/Vs at =300 K. The hole Hall mobility reaches a maximum value of 650 cm/Vs as is lowered below 150 K, indicating that insofar WSe-based field-effect transistors (FETs) display the largest Hall mobilities among the transition metal dichalcogenides. The gate capacitance, as extracted from the Hall-effect, reveals the presence of spurious charges in the channel, while the two-terminal sheet resistivity displays two-dimensional variable-range hopping behavior, indicating carrier localization induced by disorder at the interface between WSe and SiO. We argue that improvements in the fabrication protocols as, for example, the use of a substrate free of dangling bonds are likely to produce WSe-based FETs displaying higher room temperature mobilities, i.e. approaching those of -doped Si, which would make it a suitable candidate for high performance opto-electronics.
35 pages including supplementary information. 7 figures in main text, 4 figures in supplementary file
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- Sub-bandgap voltage electroluminescence and magneto-oscillations in a WSe2 light-emitting van der Waals heterostructure
- Gate controlled quantum dots in monolayer WSe2
- Low temperature carrier transport mechanism and photoconductivity of WSe2
- Multi-terminal electronic transport in boron nitride encapsulated TiS nanosheets
- Universal low-density power laws of the dc conductivity and Hall constant in the self-consistent Born approximation