29 citations · 29 across the 1 of their papers we have counts for
2 papers
cond-mat.supr-con2021
Inductance and mutual inductance of superconductor integrated circuit features with sizes down to 120 nm. Part I
Sergey. K. Tolpygo, Evan B. Golden, Terence J. Weir +1
Data are presented on inductance of various features used in superconductor digital integrated circuits such as microstrip and stripline inductors with linewidths down to 120 nm an…
cond-mat.supr-con2019★ 29 cited
Planarized Fabrication Process With Two Layers of SIS Josephson Junctions and Integration of SIS and SFS π-Junctions
Sergey K. Tolpygo, Vladimir Bolkhovsky, Ravi Rastogi +6
We present our new fabrication Process for Superconductor Electronics (PSE2) that integrates two (2) layers of Josephson junctions in a fully planarized multilayer process on 200-m…