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most citedAdvanced Fabrication Processes for Superconducting Very Large Scale Integrated Circuits

253 citations · 788 across the 16 of their papers we have counts for

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cond-mat.supr-con2019★ 29 cited

Planarized Fabrication Process With Two Layers of SIS Josephson Junctions and Integration of SIS and SFS π-Junctions

Sergey K. Tolpygo, Vladimir Bolkhovsky, Ravi Rastogi +6

We present our new fabrication Process for Superconductor Electronics (PSE2) that integrates two (2) layers of Josephson junctions in a fully planarized multilayer process on 200-m…