Dielectric Engineered Tunnel Field-Effect Transistor

Abstract

The dielectric engineered tunnel field-effect transistor (DE-TFET) as a high performance steep transistor is proposed. In this device, a combination of high-k and low-k dielectrics results in a high electric field at the tunnel junction. As a result a record ON-current of about 1000 uA/um and a subthreshold swing (SS) below 20mV/dec are predicted for WTe2 DE-TFET. The proposed TFET works based on a homojunction channel and electrically doped contacts both of which are immune to interface states, dopant fluctuations, and dopant states in the band gap which typically deteriorate the OFF-state performance and SS in conventional TFETs.

3 pages, 3 figures

References in corpus (4)

• Tunnel Field-Effect Transistors in 2D Transition Metal Dichalcogenide Materials
• Optimum High-k Oxide for the Best Performance of Ultra-scaled Double-Gate MOSFETs
• Ambipolar Graphene Field Effect Transistors by Local Metal Side Gates
• Scaling Theory of Electrically Doped 2D Transistors

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• Thickness Engineered Tunnel Field-Effect Transistors based on Phosphorene
• Configurable Electrostatically Doped High Performance Bilayer Graphene Tunnel FET
• Can Tunnel Transistors Scale Below 10nm?
• From Fowler-Nordheim to Non-Equilibrium Green's Function Modeling of Tunneling
• Design Rules for High Performance Tunnel Transistors from 2D Materials
• Sensitivity Challenge of Steep Transistors
• Channel thickness optimization for ultra thin and 2D chemically doped TFETs
• Transport in vertically stacked hetero-structures from 2D materials
• Doping profile engineered triple heterojunction TFETs with 12 nm body thickness
• 2D Canonical Approach for Beating the Boltzmann Tyranny Using Memory