most citedPlanarized Fabrication Process With Two Layers of SIS Josephson Junctions and Integration of SIS and SFS π-Junctions

29 citations · 29 across the 1 of their papers we have counts for

collaborators

1 paper

cond-mat.supr-con2019★ 29 cited

Planarized Fabrication Process With Two Layers of SIS Josephson Junctions and Integration of SIS and SFS π-Junctions

Sergey K. Tolpygo, Vladimir Bolkhovsky, Ravi Rastogi +6

We present our new fabrication Process for Superconductor Electronics (PSE2) that integrates two (2) layers of Josephson junctions in a fully planarized multilayer process on 200-m…