253 citations · 751 across the 10 of their papers we have counts for
10 papers
Extremely Large Area (88 mm X 88 mm) Superconducting Integrated Circuit (ELASIC)
Rabindra N. Das, Vladimir Bolkhovsky, Alex Wynn +9
Superconducting integrated circuit (SIC) is a promising "beyond-CMOS" device technology enables speed-of-light, nearly lossless communications to advance cryogenic (4 K or lower) c…
Progress toward superconductor electronics fabrication process with planarized NbN and NbN/Nb layers
Sergey K. Tolpygo, Justin L. Mallek, Vladimir Bolkhovsky +5
To increase density of superconductor digital and neuromorphic circuits by 10x and reach integration scale of Josephson junctions (JJs) per chip, we developed a new fabricat…
Planarized Fabrication Process With Two Layers of SIS Josephson Junctions and Integration of SIS and SFS π-Junctions
Sergey K. Tolpygo, Vladimir Bolkhovsky, Ravi Rastogi +6
We present our new fabrication Process for Superconductor Electronics (PSE2) that integrates two (2) layers of Josephson junctions in a fully planarized multilayer process on 200-m…
Superconductor Electronics Fabrication Process with MoN Kinetic Inductors and Self-Shunted Josephson Junctions
Sergey K. Tolpygo, Vladimir Bolkhovsky, D. E. Oates +6
Recent progress in superconductor electronics fabrication has enabled single-flux-quantum (SFQ) digital circuits with close to one million Josephson junctions (JJs) on 1-cm chi…
Developments Toward a 250-nm, Fully Planarized Fabrication Process With Ten Superconducting Layers And Self-Shunted Josephson Junctions
Sergey K. Tolpygo, Vladimir Bolkhovsky, Ravi Rastogi +5
We are developing a superconductor electronics fabrication process with up to nine planarized superconducting layers, stackable stud vias, self-shunted Nb/AlOx-Al/Nb Josephson junc…
Properties of Unshunted and Resistively Shunted Nb/AlOx-Al/Nb Josephson Junctions With Critical Current Densities from 0.1 mA/μm^2 to 1 mA/μm^2
Sergey K. Tolpygo, Vladimir Bolkhovsky, Scott Zarr +5
We investigated current-voltage characteristics of unshunted and externally shunted Josephson junctions (JJs) with high critical current densities, Jc, in order to extract their ba…
Advanced Fabrication Processes for Superconducting Very Large Scale Integrated Circuits
Sergey K. Tolpygo, Vladimir Bolkhovsky, T. J. Weir +4
We review the salient features of two advanced nodes of an 8-Nb-layer fully planarized process developed recently at MIT Lincoln Laboratory for fabricating Single Flux Quantum(SFQ)…
Fabrication Process and Properties of Fully-Planarized Deep-Submicron Nb/Al-AlOx/Nb Josephson Junctions for VLSI Circuits
Sergey K. Tolpygo, Vladimir Bolkhovsky, Terence J. Weir +3
A fabrication process for Nb/Al-AlOx/Nb Josephson junctions (JJs) with sizes down to 200 nm has been developed on a 200-mm-wafer tool set typical for CMOS foundry. This process is…
Inductance of Circuit Structures for MIT LL Superconductor Electronics Fabrication Process with 8 Niobium Layers
Sergey K. Tolpygo, Vladimir Bolkhovsky, T. J. Weir +4
Inductance of superconducting thin-film inductors and structures with linewidth down to 250 nm has been experimentally evaluated. The inductors include various striplines and micro…
Deep Sub-Micron Stud-Via Technology for Superconductor VLSI Circuits
Sergey K. Tolpygo, V. Bolkhovsky, T. Weir +3
A fabrication process has been developed for fully planarized Nb-based superconducting inter-layer connections (vias) with minimum size down to 250 nm for superconductor very large…