Over 1% magnetoresistance ratio at room temperature in non-degenerate silicon-based lateral spin valves

Abstract

To augment the magnetoresistance (MR) ratio of n-type non-degenerate Si-based lateral spin valves (Si-LSVs), we modify the doping profile in the Si layer and introduce a larger local strain into the Si channel by changing a capping insulator. The highest MR ratio of 1.4% is achieved in the Si-LSVs through these improvements, with significant roles played by a reduction in the resistance-area product of the ferromagnetic contacts and an enhancement of the momentum relaxation time in the Si channel.

arXiv comment14 pages, 4 figures

References in corpus (11)

• Electronic measurement and control of spin transport in Silicon
• A spin metal-oxide-semiconductor field-effect transistor using half-metallic-ferromagnet contacts for the source and drain
• Coherent spin transport through a 350-micron-thick Silicon wafer
• Theory of the spin relaxation of conduction electrons in silicon
• Local magnetoresistance in Fe/MgO/Si lateral spin valve at room temperature
• Gate-tunable large magnetoresistance in an all-semiconductor spin-transistor-like device
• Observation of large spin accumulation voltages in non-degenerate Si spin devices due to spin drift effect: Experiments and theory
• Spin-dependent transport properties of a GaMnAs-based vertical spin metal-oxide- semiconductor field-effect transistor structure
• Quantitative and systematic analysis of bias dependence of spin accumulation voltage in a non-degenerate Si spin valve
• Investigation of gating effect in Si spin MOSFET
• Gate-tunable spin exclusive or operation in a silicon-based spin device at room temperature