Enhanced Logic Performance with Semiconducting Bilayer Graphene Channels

Abstract

Realization of logic circuits in graphene with an energy gap (EG) remains one of the main challenges for graphene electronics. We found that large transport EGs (>100 meV) can be fulfilled in dual-gated bilayer graphene underneath a simple alumina passivation top gate stack, which directly contacts the graphene channels without an inserted buffer layer. With the presence of EGs, the electrical properties of the graphene transistors are significantly enhanced, as manifested by enhanced on/off current ratio, subthreshold slope and current saturation. For the first time, complementary-like semiconducting logic graphene inverters are demonstrated that show a large improvement over their metallic counterparts. This result may open the way for logic applications of gap-engineered graphene.

Accepted by ACS Nano

References in corpus (19)

• Electric Field Effect in Atomically Thin Carbon Films
• 30 inch Roll-Based Production of High-Quality Graphene Films for Flexible Transparent Electrodes
• Energy Gaps in Graphene Nanoribbons
• Control of graphene's properties by reversible hydrogenation
• Biased bilayer graphene: semiconductor with a gap tunable by electric field effect
• Gate-induced insulating state in bilayer graphene devices
• Substrate-induced bandgap in graphene on hexagonal boron nitride
• Room Temperature All Semiconducting sub-10nm Graphene Nanoribbon Field-Effect Transistors
• Charged Impurity Scattering in Graphene
• Asymmetry gap in the electronic band structure of bilayer graphene
• Graphene field-effect-transistors with high on/off current ratio and large transport band gap at room temperature
• Temperature dependent transport in suspended graphene
• Realization of a High Mobility Dual-gated Graphene Field Effect Transistor with Al2O3 Dielectric
• Fractional quantum Hall effect and insulating phase of Dirac electrons in graphene
• Ab Initio Theory of Gate Induced Gaps in Graphene Bilayers
• Utilization of a Buffered Dielectric to Achieve High Field-Effect Carrier Mobility in Graphene Transistors
• Single particle relaxation time versus transport scattering time in a 2D graphene layer
• Integrated complementary graphene inverter
• Inter-Layer Screening Length to Electric Field in Thin Graphite Film

Cited by in corpus (7)

• Charge transport and mobility engineering in two-dimensional transition metal chalcogenide semiconductors
• Quantitative Raman Spectrum and Reliable Thickness Identification for Atomic Layers on Insulating Substrates
• Complementary-like Graphene Logic Gates Controlled by Electrostatic Doping
• Electronic transport in BN-substituted bilayer graphene nano-junctions
• Carrier Injection and Scattering in Atomically Thin Chalcogenides
• Enhanced architectures for room-temperature reversible logic gates in graphene
• A nanogapped hysteresis-free field-effect transistor