Charge collection properties in an irradiated pixel sensor built in a thick-film HV-SOI process
arXiv:1701.06324 · doi:10.1088/1748-0221/12/10/P10020
Abstract
Investigation of HV-CMOS sensors for use as a tracking detector in the ATLAS experiment at the upgraded LHC (HL-LHC) has recently been an active field of research. A potential candidate for a pixel detector built in Silicon-On-Insulator (SOI) technology has already been characterized in terms of radiation hardness to TID (Total Ionizing Dose) and charge collection after a moderate neutron irradiation. In this article we present results of an extensive irradiation hardness study with neutrons up to a fluence of 1x10e16 neq/cm2. Charge collection in a passive pixelated structure was measured by Edge Transient Current Technique (E-TCT). The evolution of the effective space charge concentration was found to be compliant with the acceptor removal model, with the minimum of the space charge concentration being reached after 5x10e14 neq/cm2. An investigation of the in-pixel uniformity of the detector response revealed parasitic charge collection by the epitaxial silicon layer characteristic for the SOI design. The results were backed by a numerical simulation of charge collection in an equivalent detector layout.
arXiv comment14 pages, 10 figures
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Cited by in corpus (4)
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- Investigation of the Boron removal effect induced by 5.5 MeV electrons on highly doped EPI- and Cz-silicon
- Study of neutron irradiation effects in Depleted CMOS detector structures
- Characterisation of analogue front end and time walk in CMOS active pixel sensor