Foundry compatible, efficient wafer-scale manufacturing of ultra-low loss, high-density Si${}_3$N${}_4$ photonic integrated circuits

Abstract

Silicon nitride (Si${}_3$N${}_4$) photonic integrated circuits (PICs) have shown low linear loss, negligible nonlinear loss, and high power handling over traditional silicon photonics. To achieve high-density photonic integration and high effective nonlinearity through tight optical confinement, thick stoichiometric Si${}_3$N${}_4$ films are indispensable. However, when using low-pressure chemical vapor deposition (LPCVD) to achieve high optical material transparency, Si${}_3$N${}_4$ films exhibit large tensile stress on the order of GPa. Methods for crack prevention are therefore essential. The photonic Damascene process has addressed this issue, attaining record low loss Si${}_3$N${}_4$ PICs, but it lacks control of the waveguide height. Conversely, precise waveguide dimension and ultra-low loss have been achieved with subtractive processing, but this method is not compatible with mass production due to the use of electron beam lithography. To date, an outstanding challenge is to attain both lithographic precision and ultra-low loss in high confinement Si${}_3$N${}_4$ PICs that are compatible with large-scale foundry manufacturing. Here, we present a single-step deposited, DUV-based subtractive method for producing wafer-scale ultra-low loss Si${}_3$N${}_4$ PICs that harmonize these necessities. By employing deep etching of densely distributed, interconnected trenches into the substrate, we effectively mitigate the tensile stress in the Si${}_3$N${}_4$ layer, enabling direct deposition of thick films without cracking and substantially prolonged storage duration. Lastly, we identify ultraviolet (UV) radiation-induced damage that can be remedied through rapid thermal annealing. Collectively, we develop ultra-low loss Si${}_3$N${}_4$ microresonators and 0.5 m-long spiral waveguides with losses down to 1.4 dB/m at 1550 nm with high production yield.

2023 Conference on Lasers and Electro-Optics (CLEO). IEEE, 2023

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