Blocking transition of interface traps in MoS${}_2$-on-SiO${}_2$ FETs

Abstract

Electrical conductivity with gate-sweep in a few layer MoS${}_2$-on-SiO${}_2$ field-effect-transistor shows an abrupt reduction in hysteresis when cooled. The hysteresis and time dependent conductivity of the MoS${}_2$ channel are modeled using the dynamics of interface traps' occupancy. The reduction in hysteresis is found to be steepest at a blocking temperature near 225 K. This is attributed to the interplay between thermal and barrier energies and fitted using a distribution of the latter. Further, the charge stored in the blocked traps is programmed at low temperatures by cooling under suitable gate voltage. Thus the threshold gate-voltage in nearly non-hysteretic devices at 80 K temperature is reversibly controlled over a wide range.

14 pages, 13 figures

References in corpus (7)

• Anomalous Lattice Vibrations of Single and Few-Layer MoS2
• Channel Length Scaling of MoS2 MOSFETs
• Light Generation and Harvesting in a Van der Waals Heterostructure
• Optical identification of atomically thin dichalcogenide crystals
• MoS2 Transistors Operating at Gigahertz Frequencies
• Carrier statistics and quantum capacitance effects on mobility extraction in two-dimensional crystal semiconductor field-effect transistors
• Identification of two trapping mechanisms responsible of the threshold voltage variation in SiO${}_2$/4H-SiC MOSFETs

Cited by in corpus (1)

• Selenization of V${}_2$O${}_5$/WO${}_3$ Bilayers for Tuned Optoelectronic Response of WSe${}_2$ Films