Fabrication of Surface Ion Traps with Integrated Current Carrying Wires enabling High Magnetic Field Gradients

Abstract

A major challenge for quantum computers is the scalable simultaneous execution of quantum gates. One approach to address this in trapped ion quantum computers is the implementation of quantum gates based on static magnetic field gradients and global microwave fields. In this paper, we present the fabrication of surface ion traps with integrated copper current carrying wires embedded inside the substrate below the ion trap electrodes, capable of generating high magnetic field gradients. The copper layer's measured sheet resistance of 1.12 m$\Omega$/sq at room temperature is sufficiently low to incorporate complex designs, without excessive power dissipation at high currents causing a thermal runaway. At a temperature of 40 K the sheet resistance drops to 20.9 $\mu \Omega$/sq giving a lower limit for the residual resistance ratio of 100. Continuous currents of 13 A can be applied, resulting in a simulated magnetic field gradient of 144 T/m at the ion position, which is 125 $\mu$m from the trap surface for the particular anti-parallel wire pair in our design.

11 pages, 8 figures

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Cited by in corpus (4)

• High-fidelity trapped-ion qubit operations with scalable photonic modulators
• Scalable surface ion trap design for magnetic quantum sensing and gradiometry
• The role of higher-order terms in trapped-ion quantum computing with magnetic gradient induced coupling
• Novel permanent magnet array geometries for scalable trapped-ion quantum computing in a laser-free entanglement architecture