Multifunctional Spin Logic Gates In Graphene Spin Circuits
arXiv:2108.12259 · doi:10.1103/PhysRevApplied.18.064063
Abstract
All-spin-based computing combining logic and nonvolatile magnetic memory is promising for emerging information technologies. However, the realization of a universal spin logic operation representing a reconfigurable building block with all-electrical spin current communication has so far remained challenging. Here, we experimentally demonstrate a reprogrammable all-electrical multifunctional spin logic gate in a nanoelectronic device architecture utilizing graphene buses for spin communication and multiplexing and nanomagnets for writing and reading information at room temperature. This gate realizes a multistate majority spin logic operation (sMAJ), which is reconfigured to achieve XNOR, (N)AND, and (N)OR Boolean operations depending on the magnetization of inputs. Physics-based spin circuit model is developed to understand the underlying mechanisms of the multifunctional spin logic gate and its operations. These demonstrations provide a platform for scalable all-electric spin logic and neuromorphic computing in the all-spin domain logic-in-memory architecture.
References in corpus (9)
- Magnetic 2D materials and heterostructures
- Graphene Spintronics
- Van der Waals heterostructures for spintronics and opto-spintronics
- Electronic spin drift in graphene field effect transistors
- Spin communication over 30 m long channels of chemical vapor deposited graphene on SiO
- Spin transport in graphene nanostructures
- Robust Spin Interconnect with Isotropic Spin Dynamics in Chemical Vapour Deposited Graphene Layers and Boundaries
- Charge-induced artifacts in non-local spin transport measurements: How to prevent spurious voltage signals
- Carrier Drift Control of Spin Currents in Graphene-Based Spin-Current Demultiplexers