Suppression of Surface-Originated Gate-Lag by a Dual-Channel AlN/GaN HEMT Architecture

Abstract

A dual-channel AlN/GaN high electron mobility transistor (HEMT) architecture is demonstrated that leverages ultra-thin epitaxial layers to suppress surface-state related gate lag. Two high-density two-dimensional electron gas (2DEG) channels are utilized in an AlN/GaN/AlN/GaN heterostructure wherein the top 2DEG serves as a quasi-equipotential that screens potential fluctuations resulting from surface and interface trapped charge. The bottom channel serves as the transistor's modulated channel. Dual-channel AlN/GaN heterostructures were grown by molecular beam epitaxy on free-standing HVPE GaN substrates where 300 nm long recessed and non-recessed gate HEMTs were fabricated. The recessed-gate HEMT demonstrated a gate lag ratio (GLR) of 0.88 with no collapse in drain current and supporting small signal metrics $f_t/f_{max}$ of 27/46 GHz. These performance results are contrasted with the non-recessed gate dual-channel HEMT with a GLR of 0.74 and 82 mA/mm current collapse with $f_t/f_{max}$ of 48/60 GHz.

6 pages, 6 figures, in review at IEEE Transactions on Electron Devices

Cited by in corpus (1)

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