Thermionic charge transport in CMOS nano-transistors

Abstract

We report on DC and microwave electrical transport measurements in silicon-on-insulator CMOS nano-transistors at low and room temperature. At low source-drain voltage, the DC current and RF response show signs of conductance quantization. We attribute this to Coulomb blockade resulting from barriers formed at the spacer-gate interfaces. We show that at high bias transport occurs thermionically over the highest barrier: Transconductance traces obtained from microwave scattering-parameter measurements at liquid helium and room temperature is accurately fitted by a thermionic model. From the fits we deduce the ratio of gate capacitance and quantum capacitance, as well as the electron temperature.

References in corpus (2)

• A simple and controlled single electron transistor based on doping modulation in silicon nanowires
• Thermal shot noise in top-gated single carbon nanotube field effect transistors

Cited by in corpus (9)

• A high-sensitivity gate-based charge sensor in silicon
• Probing quantum devices with radio-frequency reflectometry
• Gate-sensing coherent charge oscillations in a silicon field-effect transistor
• Radio-frequency capacitive gate-based sensing
• Primary thermometry of a single reservoir using cyclic electron tunneling in a CMOS transistor
• A silicon-based single-electron interferometer coupled to a fermionic sea
• Conditional dispersive readout of a CMOS quantum dot via an integrated transistor circuit
• Ambipolar quantum dots in intrinsic silicon
• Non-galvanic calibration and operation of a quantum dot thermometer