Two-dimensional linear trap array for quantum information processing

Abstract

We present an ion-lattice quantum processor based on a two-dimensional arrangement of linear surface traps. Our design features a tunable coupling between ions in adjacent lattice sites and a configurable ion-lattice connectivity, allowing one, e.g., to realize rectangular and triangular lattices with the same trap chip. We present detailed trap simulations of a simplest-instance ion array with $2\times 9$ trapping sites and report on the fabrication of a prototype device in an industrial facility. The design and the employed fabrication processes are scalable to larger array sizes. We demonstrate trapping of ions in rectangular and triangular lattices and demonstrate transport of a $2\times 2$ ion-lattice over one lattice period.

26 pages, 17 figures

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• Controlling two-dimensional Coulomb crystals of more than 100 ions in a monolithic radio-frequency trap
• How to wire a 1000-qubit trapped ion quantum computer
• Industrially Microfabricated Ion Trap with 1 eV Trap Depth
• TSV-integrated Surface Electrode Ion Trap for Scalable Quantum Information Processing
• Optimizing the chiral Purcell factor for unidirectional single photon emitters in topological photonic crystal waveguides using inverse design
• Photo-induced charge carrier dynamics in a semiconductor-based ion trap investigated via motion-sensitive qubit transitions
• Electric field noise in a high-temperature superconducting surface ion trap
• Classical product code constructions for quantum Calderbank-Shor-Steane codes
• Demonstration of two-dimensional connectivity for a scalable error-corrected ion-trap quantum processor architecture
• Test and characterization of multilayer ion traps on fused silica