Gating of high-mobility InAs metamorphic heterostructures
arXiv:1408.2318 · doi:10.1063/1.4905370
Abstract
We investigate the performance of gate-defined devices fabricated on high mobility InAs metamorphic heterostructures. We find that heterostructures capped with InGaAs often show signs of parallel conduction due to proximity of their surface Fermi level to the conduction band minimum. Here, we introduce a technique that can be used to estimate the density of this surface charge that involves cool-downs from room temperature under gate bias. We have been able to remove the parallel conduction under high positive bias, but achieving full depletion has proven difficult. We find that by using InAlAs as the barrier without an InGaAs capping, a drastic reduction in parallel conduction can be achieved. Our studies show that this does not change the transport properties of the quantum well significantly. We achieved full depletion in InAlAs capped heterostructures with non-hysteretic gating response suitable for fabrication of gate-defined mesoscopic devices.
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- Experimental Measurements of Effective Mass in Near Surface InAs Quantum Wells
- Tuning supercurrent in Josephson field effect transistors using h-BN dielectric
- Progress in superconductor-semiconductor topological Josephson junctions
- A Gate-Defined Quantum Point Contact in an InAs Two-Dimensional Electron Gas
- Observation of fractional quantum Hall effect in an InAs quantum well
- Controlling Fermi level pinning in near-surface InAs quantum wells
- Equal-Spin Andreev Reflection in Junctions of Spin-Resolved Quantum Hall Bulk State and Spin-Singlet Superconductor
- Magnetic Field Inducing Zeeman Splitting and Anomalous Conductance Reduction of Half-integer Quantized Plateaus in InAs Quantum Wires
- Gating of two-dimensional electron systems in InGaAs/InAlAs heterostructures: the role of the intrinsic InAlAs deep donor defects
- Clean quantum point contacts in an InAs quantum well grown on a lattice-mismatched InP substrate