12 papers
SCALE: Self-Supervised Constraint-Aware Layout GEneration for Local P&R DRV Fixing at Advanced Nodes
Chia-Tung Ho, Haoyu Yang, Guanglei Zhou +6
As semiconductor manufacturing advances toward sub-2nm nodes, local place-and-route (P&R) design-rule violation (DRV) fixing is increasingly limited by complex rule interactions, d…
EvoDRC: A Self-Evolving Agentic Framework for Automated DRC Violation Repair
Bing-Yue Wu, Chia-Tung Ho, Haoyu Yang +2
Design rule check (DRC) closure remains a major bottleneck in advanced-node physical design. Although detailed routers are rule-aware, residual design rule violations (DRVs) often…
End-to-End Physical Design Automation Flow for Yield-Optimized Inverse-Designed Large-Scale Electronic-Photonic Integrated Circuits
Hongjian Zhou, Haoyu Yang, Haoxing Ren +2
As AI systems scale to multi-chiplet and wafer-level architectures, the demand for ultra-high bandwidth and system scalability has outpaced the capabilities of electrical interconn…
Pushing the Limits of Inverse Lithography with Generative Reinforcement Learning
Haoyu Yang, Haoxing Ren
Inverse lithography (ILT) is critical for modern semiconductor manufacturing but suffers from highly non-convex objectives that often trap optimization in poor local minima. Genera…
Multimodal Chip Physical Design Engineer Assistant
Yun-Da Tsai, Chang-Yu Chao, Liang-Yeh Shen +7
Modern chip physical design relies heavily on Electronic Design Automation (EDA) tools, which often struggle to provide interpretable feedback or actionable guidance for improving…
Deep Generative Prior for First Order Inverse Optimization
Haoyu Yang, Kamyar Azizzadenesheli, Haoxing Ren
Inverse design optimization aims to infer system parameters from observed solutions, posing critical challenges across domains such as semiconductor manufacturing, structural engin…
Apollo: Automated Routing-Informed Placement for Large-Scale Photonic Integrated Circuits
Hongjian Zhou, Haoyu Yang, Nicholas Gangi +3
As technology advances, photonic integrated circuits (PICs) are rapidly scaling in size and complexity, with modern designs integrating thousands of components. However, the analog…
GPU-Accelerated Inverse Lithography Towards High Quality Curvy Mask Generation
Haoyu Yang, Haoxing Ren
Inverse Lithography Technology (ILT) has emerged as a promising solution for photo mask design and optimization. Relying on multi-beam mask writers, ILT enables the creation of fre…
Differentiable Edge-based OPC
Guojin Chen, Haoyu Yang, Haoxing Ren +2
Optical proximity correction (OPC) is crucial for pushing the boundaries of semiconductor manufacturing and enabling the continued scaling of integrated circuits. While pixel-based…
Intelligent OPC Engineer Assistant for Semiconductor Manufacturing
Guojin Chen, Haoyu Yang, Bei Yu +1
Advancements in chip design and manufacturing have enabled the processing of complex tasks such as deep learning and natural language processing, paving the way for the development…
ILILT: Implicit Learning of Inverse Lithography Technologies
Haoyu Yang, Haoxing Ren
Lithography, transferring chip design masks to the silicon wafer, is the most important phase in modern semiconductor manufacturing flow. Due to the limitations of lithography syst…
Optimizing Predictive AI in Physical Design Flows with Mini Pixel Batch Gradient Descent
Haoyu Yang, Anthony Agnesina, Haoxing Ren
Exploding predictive AI has enabled fast yet effective evaluation and decision-making in modern chip physical design flows. State-of-the-art frameworks typically include the object…