57 citations · 139 across the 8 of their papers we have counts for
8 papers
Fabrication and Properties of NbN/NbNx/NbN and Nb/NbNx/Nb Josephson Junctions
Sergey K. Tolpygo, Ravi Rastogi, David Kim +3
Increasing integration scale of superconductor electronics (SCE) requires employing kinetic inductors and self-shunted Josephson junctions (JJs) for miniaturizing inductors and JJs…
Development of Self-Shunted Josephson Junctions For a Ten-Superconductor-Layer Fabrication Process: Nb/NbN/Nb Junctions
Sergey K. Tolpygo, Ravi Rastogi, Terence Weir +2
To increase integration scale of superconductor electronics, we are developing a new, SFQ7ee, node of the fabrication process at MIT Lincoln Laboratory. In comparison to the existi…
Extremely Large Area (88 mm X 88 mm) Superconducting Integrated Circuit (ELASIC)
Rabindra N. Das, Vladimir Bolkhovsky, Alex Wynn +9
Superconducting integrated circuit (SIC) is a promising "beyond-CMOS" device technology enables speed-of-light, nearly lossless communications to advance cryogenic (4 K or lower) c…
Progress toward superconductor electronics fabrication process with planarized NbN and NbN/Nb layers
Sergey K. Tolpygo, Justin L. Mallek, Vladimir Bolkhovsky +5
To increase density of superconductor digital and neuromorphic circuits by 10x and reach integration scale of Josephson junctions (JJs) per chip, we developed a new fabricat…
Self- and Mutual Inductance of NbN and Bilayer NbN/Nb Inductors in Planarized Fabrication Process With Nb Ground Planes
Sergey K. Tolpygo, Evan B. Golden, Terence J. Weir +2
We present measurements of the self- and mutual inductance of NbN and bilayer NbN/Nb inductors with Nb ground plane(s) fabricated in an advanced process for superconductor electron…
Planarized Fabrication Process With Two Layers of SIS Josephson Junctions and Integration of SIS and SFS π-Junctions
Sergey K. Tolpygo, Vladimir Bolkhovsky, Ravi Rastogi +6
We present our new fabrication Process for Superconductor Electronics (PSE2) that integrates two (2) layers of Josephson junctions in a fully planarized multilayer process on 200-m…
Superconductor Electronics Fabrication Process with MoN Kinetic Inductors and Self-Shunted Josephson Junctions
Sergey K. Tolpygo, Vladimir Bolkhovsky, D. E. Oates +6
Recent progress in superconductor electronics fabrication has enabled single-flux-quantum (SFQ) digital circuits with close to one million Josephson junctions (JJs) on 1-cm chi…
Developments Toward a 250-nm, Fully Planarized Fabrication Process With Ten Superconducting Layers And Self-Shunted Josephson Junctions
Sergey K. Tolpygo, Vladimir Bolkhovsky, Ravi Rastogi +5
We are developing a superconductor electronics fabrication process with up to nine planarized superconducting layers, stackable stud vias, self-shunted Nb/AlOx-Al/Nb Josephson junc…