57 citations · 139 across the 8 of their papers we have counts for
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Development of Self-Shunted Josephson Junctions For a Ten-Superconductor-Layer Fabrication Process: Nb/NbN/Nb Junctions
Sergey K. Tolpygo, Ravi Rastogi, Terence Weir +2
To increase integration scale of superconductor electronics, we are developing a new, SFQ7ee, node of the fabrication process at MIT Lincoln Laboratory. In comparison to the existi…
Extremely Large Area (88 mm X 88 mm) Superconducting Integrated Circuit (ELASIC)
Rabindra N. Das, Vladimir Bolkhovsky, Alex Wynn +9
Superconducting integrated circuit (SIC) is a promising "beyond-CMOS" device technology enables speed-of-light, nearly lossless communications to advance cryogenic (4 K or lower) c…
Progress toward superconductor electronics fabrication process with planarized NbN and NbN/Nb layers
Sergey K. Tolpygo, Justin L. Mallek, Vladimir Bolkhovsky +5
To increase density of superconductor digital and neuromorphic circuits by 10x and reach integration scale of Josephson junctions (JJs) per chip, we developed a new fabricat…