activity
20192023
most citedAdversarial Graph Augmentation to Improve Graph Contrastive Learning

142 citations · 552 across the 32 of their papers we have counts for

collaborators

32 papers

cs.CV2023

Rapid-INR: Storage Efficient CPU-free DNN Training Using Implicit Neural Representation

Hanqiu Chen, Hang Yang, Stephen Fitzmeyer +1

Implicit Neural Representation (INR) is an innovative approach for representing complex shapes or objects without explicitly defining their geometry or surface structure. Instead,…

cs.AR2023

DGNN-Booster: A Generic FPGA Accelerator Framework For Dynamic Graph Neural Network Inference

Hanqiu Chen, Cong Hao

Dynamic Graph Neural Networks (DGNNs) are becoming increasingly popular due to their effectiveness in analyzing and predicting the evolution of complex interconnected graph-based s…

cs.AR2023★ 16 cited

GNNBuilder: An Automated Framework for Generic Graph Neural Network Accelerator Generation, Simulation, and Optimization

Stefan Abi-Karam, Cong Hao

There are plenty of graph neural network (GNN) accelerators being proposed. However, they highly rely on users' hardware expertise and are usually optimized for one specific GNN mo…

cs.AR2023★ 3 cited

Gamora: Graph Learning based Symbolic Reasoning for Large-Scale Boolean Networks

Nan Wu, Yingjie Li, Cong Hao +3

Reasoning high-level abstractions from bit-blasted Boolean networks (BNs) such as gate-level netlists can significantly benefit functional verification, logic minimization, datapat…

cs.AR2022

Bottleneck Analysis of Dynamic Graph Neural Network Inference on CPU and GPU

Hanqiu Chen, Yahya Alhinai, Yihan Jiang +2

Dynamic graph neural network (DGNN) is becoming increasingly popular because of its widespread use in capturing dynamic features in the real world. A variety of dynamic graph neura…

cs.LG2022★ 4 cited

Unsupervised Learning for Combinatorial Optimization with Principled Objective Relaxation

Haoyu Wang, Nan Wu, Hang Yang +2

Using machine learning to solve combinatorial optimization (CO) problems is challenging, especially when the data is unlabeled. This work proposes an unsupervised learning framewor…

cs.LG2022

Compilation and Optimizations for Efficient Machine Learning on Embedded Systems

Xiaofan Zhang, Yao Chen, Cong Hao +3

Deep Neural Networks (DNNs) have achieved great success in a variety of machine learning (ML) applications, delivering high-quality inferencing solutions in computer vision, natura…

cs.LG2022★ 2 cited

H2H: Heterogeneous Model to Heterogeneous System Mapping with Computation and Communication Awareness

Xinyi Zhang, Cong Hao, Peipei Zhou +2

The complex nature of real-world problems calls for heterogeneity in both machine learning (ML) models and hardware systems. The heterogeneity in ML models comes from multi-sensor…

cs.DC2022★ 2 cited

FlowGNN: A Dataflow Architecture for Real-Time Workload-Agnostic Graph Neural Network Inference

Rishov Sarkar, Stefan Abi-Karam, Yuqi He +2

Graph neural networks (GNNs) have recently exploded in popularity thanks to their broad applicability to graph-related problems such as quantum chemistry, drug discovery, and high…

cs.AR2022★ 3 cited

Enabling Flexibility for Sparse Tensor Acceleration via Heterogeneity

Eric Qin, Raveesh Garg, Abhimanyu Bambhaniya +5

Recently, numerous sparse hardware accelerators for Deep Neural Networks (DNNs), Graph Neural Networks (GNNs), and scientific computing applications have been proposed. A common ch…

cs.LG2022★ 9 cited

GenGNN: A Generic FPGA Framework for Graph Neural Network Acceleration

Stefan Abi-Karam, Yuqi He, Rishov Sarkar +3

Graph neural networks (GNNs) have recently exploded in popularity thanks to their broad applicability to ubiquitous graph-related problems such as quantum chemistry, drug discovery…

cs.LG2022★ 56 cited

High-Level Synthesis Performance Prediction using GNNs: Benchmarking, Modeling, and Advancing

Nan Wu, Hang Yang, Yuan Xie +2

Agile hardware development requires fast and accurate circuit quality evaluation from early design stages. Existing work of high-level synthesis (HLS) performance prediction usuall…

cs.LG2021★ 1 cited

Program-to-Circuit: Exploiting GNNs for Program Representation and Circuit Translation

Nan Wu, Huake He, Yuan Xie +2

Circuit design is complicated and requires extensive domain-specific expertise. One major obstacle stuck on the way to hardware agile development is the considerably time-consuming…

cs.LG2021★ 3 cited

Generic Neural Architecture Search via Regression

Yuhong Li, Cong Hao, Pan Li +2

Most existing neural architecture search (NAS) algorithms are dedicated to and evaluated by the downstream tasks, e.g., image classification in computer vision. However, extensive…

cs.AR2021★ 3 cited

WinoCNN: Kernel Sharing Winograd Systolic Array for Efficient Convolutional Neural Network Acceleration on FPGAs

Xinheng Liu, Yao Chen, Cong Hao +2

The combination of Winograd's algorithm and systolic array architecture has demonstrated the capability of improving DSP efficiency in accelerating convolutional neural networks (C…

cs.PL2021★ 2 cited

ScaleHLS: A New Scalable High-Level Synthesis Framework on Multi-Level Intermediate Representation

Hanchen Ye, Cong Hao, Jianyi Cheng +4

High-level synthesis (HLS) has been widely adopted as it significantly improves the hardware design productivity and enables efficient design space exploration (DSE). Existing HLS…

cs.LG2021★ 142 cited

Adversarial Graph Augmentation to Improve Graph Contrastive Learning

Susheel Suresh, Pan Li, Cong Hao +1

Self-supervised learning of graph neural networks (GNN) is in great need because of the widespread label scarcity issue in real-world graph/network data. Graph contrastive learning…

cs.LG2021★ 1 cited

3U-EdgeAI: Ultra-Low Memory Training, Ultra-Low BitwidthQuantization, and Ultra-Low Latency Acceleration

Yao Chen, Cole Hawkins, Kaiqi Zhang +2

The deep neural network (DNN) based AI applications on the edge require both low-cost computing platforms and high-quality services. However, the limited memory, computing resource…

cs.AR2021★ 10 cited

On-FPGA Training with Ultra Memory Reduction: A Low-Precision Tensor Method

Kaiqi Zhang, Cole Hawkins, Xiyuan Zhang +2

Various hardware accelerators have been developed for energy-efficient and real-time inference of neural networks on edge devices. However, most training is done on high-performanc…

cs.DC2021★ 1 cited

MELOPPR: Software/Hardware Co-design for Memory-efficient Low-latency Personalized PageRank

Lixiang Li, Yao Chen, Zacharie Zirnheld +2

Personalized PageRank (PPR) is a graph algorithm that evaluates the importance of the surrounding nodes from a source node. Widely used in social network related applications such…

cs.AI2021★ 1 cited

Software/Hardware Co-design for Multi-modal Multi-task Learning in Autonomous Systems

Cong Hao, Deming Chen

Optimizing the quality of result (QoR) and the quality of service (QoS) of AI-empowered autonomous systems simultaneously is very challenging. First, there are multiple input sourc…

cs.AR2021

Enabling Design Methodologies and Future Trends for Edge AI: Specialization and Co-design

Cong Hao, Jordan Dotzel, Jinjun Xiong +3

Artificial intelligence (AI) technologies have dramatically advanced in recent years, resulting in revolutionary changes in people's lives. Empowered by edge computing, AI workload…

cs.LG2021★ 24 cited

HW-NAS-Bench:Hardware-Aware Neural Architecture Search Benchmark

Chaojian Li, Zhongzhi Yu, Yonggan Fu +6

HardWare-aware Neural Architecture Search (HW-NAS) has recently gained tremendous attention by automating the design of DNNs deployed in more resource-constrained daily life device…

cs.AR2020

Effective Algorithm-Accelerator Co-design for AI Solutions on Edge Devices

Cong Hao, Yao Chen, Xiaofan Zhang +4

High quality AI solutions require joint optimization of AI algorithms, such as deep neural networks (DNNs), and their hardware accelerators. To improve the overall solution quality…