142 citations · 308 across the 24 of their papers we have counts for
11 papers · 1 filter
Program-to-Circuit: Exploiting GNNs for Program Representation and Circuit Translation
Nan Wu, Huake He, Yuan Xie +2
Circuit design is complicated and requires extensive domain-specific expertise. One major obstacle stuck on the way to hardware agile development is the considerably time-consuming…
Generic Neural Architecture Search via Regression
Yuhong Li, Cong Hao, Pan Li +2
Most existing neural architecture search (NAS) algorithms are dedicated to and evaluated by the downstream tasks, e.g., image classification in computer vision. However, extensive…
WinoCNN: Kernel Sharing Winograd Systolic Array for Efficient Convolutional Neural Network Acceleration on FPGAs
Xinheng Liu, Yao Chen, Cong Hao +2
The combination of Winograd's algorithm and systolic array architecture has demonstrated the capability of improving DSP efficiency in accelerating convolutional neural networks (C…
ScaleHLS: A New Scalable High-Level Synthesis Framework on Multi-Level Intermediate Representation
Hanchen Ye, Cong Hao, Jianyi Cheng +4
High-level synthesis (HLS) has been widely adopted as it significantly improves the hardware design productivity and enables efficient design space exploration (DSE). Existing HLS…
Adversarial Graph Augmentation to Improve Graph Contrastive Learning
Susheel Suresh, Pan Li, Cong Hao +1
Self-supervised learning of graph neural networks (GNN) is in great need because of the widespread label scarcity issue in real-world graph/network data. Graph contrastive learning…
3U-EdgeAI: Ultra-Low Memory Training, Ultra-Low BitwidthQuantization, and Ultra-Low Latency Acceleration
Yao Chen, Cole Hawkins, Kaiqi Zhang +2
The deep neural network (DNN) based AI applications on the edge require both low-cost computing platforms and high-quality services. However, the limited memory, computing resource…