142 citations · 283 across the 17 of their papers we have counts for
7 papers · 1 filter
DGNN-Booster: A Generic FPGA Accelerator Framework For Dynamic Graph Neural Network Inference
Hanqiu Chen, Cong Hao
Dynamic Graph Neural Networks (DGNNs) are becoming increasingly popular due to their effectiveness in analyzing and predicting the evolution of complex interconnected graph-based s…
GNNBuilder: An Automated Framework for Generic Graph Neural Network Accelerator Generation, Simulation, and Optimization
Stefan Abi-Karam, Cong Hao
There are plenty of graph neural network (GNN) accelerators being proposed. However, they highly rely on users' hardware expertise and are usually optimized for one specific GNN mo…
Enabling Flexibility for Sparse Tensor Acceleration via Heterogeneity
Eric Qin, Raveesh Garg, Abhimanyu Bambhaniya +5
Recently, numerous sparse hardware accelerators for Deep Neural Networks (DNNs), Graph Neural Networks (GNNs), and scientific computing applications have been proposed. A common ch…
WinoCNN: Kernel Sharing Winograd Systolic Array for Efficient Convolutional Neural Network Acceleration on FPGAs
Xinheng Liu, Yao Chen, Cong Hao +2
The combination of Winograd's algorithm and systolic array architecture has demonstrated the capability of improving DSP efficiency in accelerating convolutional neural networks (C…
On-FPGA Training with Ultra Memory Reduction: A Low-Precision Tensor Method
Kaiqi Zhang, Cole Hawkins, Xiyuan Zhang +2
Various hardware accelerators have been developed for energy-efficient and real-time inference of neural networks on edge devices. However, most training is done on high-performanc…
Enabling Design Methodologies and Future Trends for Edge AI: Specialization and Co-design
Cong Hao, Jordan Dotzel, Jinjun Xiong +3
Artificial intelligence (AI) technologies have dramatically advanced in recent years, resulting in revolutionary changes in people's lives. Empowered by edge computing, AI workload…