output
20062010
most citedMemory Aware High-Level Synthesis for Embedded Systems

2 citations

11 papers

cs.PF2010

Simulation de traces réelles d'E/S disque de PC

Jalil Boukhobza, Timsit Claude

Under Windows operating system, existing I/O benchmarking tools does not allow a developer to efficiently define a file access strategy according to the applications' constraints.…

cs.AR2007

Synchronization Processor Synthesis for Latency Insensitive Systems

Pierre Bomel, Eric Martin, Emmanuel Boutillon

In this paper we present our contribution in terms of synchronization processor for a SoC design methodology based on the theory of the latency insensitive systems (LIS) of Carloni…

cs.AR2007

Application of a design space exploration tool to enhance interleaver generation

Cyrille Chavet, Philippe Coussy, Pascal Urard +1

This paper presents a methodology to efficiently explore the design space of communication adapters. In most digital signal processing (DSP) applications, the overall performance o…

cs.AR2007

Méthodologie de modélisation et d'implémentation d'adaptateurs spatio-temporels

Cyrille Chavet, Philippe Coussy, Pascal Urard +1

The re-use of pre-designed blocks is a well-known concept of the software development. This technique has been applied to System-on-Chip (SoC) design whose complexity and heterogen…

cs.AR2007

A Design Methodology for Space-Time Adapter

Cyrille Chavet, Philippe Coussy, Pascal Urard +1

This paper presents a solution to efficiently explore the design space of communication adapters. In most digital signal processing (DSP) applications, the overall architecture of…

cs.AR2007★ 2 cited

A Methodology for Efficient Space-Time Adapter Design Space Exploration: A Case Study of an Ultra Wide Band Interleaver

Cyrille Chavet, Philippe Coussy, Pascal Urard +1

This paper presents a solution to efficiently explore the design space of communication adapters. In most digital signal processing (DSP) applications, the overall architecture of…