3 citations · 6 across the 9 of their papers we have counts for
9 papers
Evaluation of the Performance/Energy Overhead in DSP Video Decoding and its Implications
Yahia Benmoussa, Jalil Boukhobza, Eric Senn +1
Video decoding is considered as one of the most compute and energy intensive application in energy constrained mobile devices. Some specific processing units, such as DSPs, are add…
DyPS: Dynamic Processor Switching for Energy-Aware Video Decoding on Multi-core SoCs
Yahia Benmoussa, Jalil Boukhobza, Eric Senn +2
In addition to General Purpose Processors (GPP), Multicore SoCs equipping modern mobile devices contain specialized Digital Signal Processor designed with the aim to provide better…
Flashmon V2: Monitoring Raw NAND Flash Memory I/O Requests on Embedded Linux
Pierre Olivier, Jalil Boukhobza, Eric Senn
This paper presents Flashmon version 2, a tool for monitoring embedded Linux NAND flash memory I/O requests. It is designed for embedded boards based devices containing raw flash c…
Toward a Unified Performance and Power Consumption NAND Flash Memory Model of Embedded and Solid State Secondary Storage Systems
Pierre Olivier, Jalil Boukhobza, Eric Senn
This paper presents a set of models dedicated to describe a flash storage subsystem structure, functions, performance and power consumption behaviors. These models cover a large ra…
On Benchmarking Embedded Linux Flash File Systems
Pierre Olivier, Jalil Boukhobza, Eric Senn
Due to its attractive characteristics in terms of performance, weight and power consumption, NAND flash memory became the main non volatile memory (NVM) in embedded systems. Those…
Performance Evaluation of Flash File Systems
Pierre Olivier, Jalil Boukhobza, Eric Senn
Today, flash memory are strongly used in the embedded system domain. NAND flash memories are the building block of main secondary storage systems. Such memories present many benefi…
Memory Aware High-Level Synthesis for Embedded Systems
Gwenolé Corre, Eric Senn, Nathalie Julien +1
We introduce a new approach to take into account the memory architecture and the memory mapping in the High- Level Synthesis of Real-Time embedded systems. We formalize the memory…
A Memory Aware High Level Synthesis Too
Gwenolé Corre, Nathalie Julien, Eric Senn +1
We introduce a new approach to take into account the memory architecture and the memory mapping in High- Level Synthesis for data intensive applications. We formalize the memory ma…
High-level synthesis under I/O Timing and Memory constraints
Philippe Coussy, Gwenolé Corre, Pierre Bomel +2
The design of complex Systems-on-Chips implies to take into account communication and memory access constraints for the integration of dedicated hardware accelerator. In this paper…