3.5k citations
Counting papers with at most 25 authors, so collaboration author lists do not stand in for the people here.
- University Hospital Schleswig-HolsteinDE21 papers
- Universität HamburgDE14 papers
- Ludwig-Maximilians-Universität MünchenDE11 papers
- University of OxfordGB10 papers
- Hamburg University of TechnologyDE9 papers
- University Medical Center Hamburg-EppendorfDE9 papers
- Worcester Polytechnic InstituteUS9 papers
- Christian-Albrechts-Universität zu KielDE8 papers
- Heidelberg UniversityDE8 papers
- University of KaiserslauternDE8 papers
- Fraunhofer Institute for Digital MedicineDE7 papers
- Institute of Applied Mathematics and MechanicsUA7 papers
5 papers · 2 filters
JackHammer: Efficient Rowhammer on Heterogeneous FPGA-CPU Platforms
Zane Weissman, Thore Tiemann, Daniel Moghimi +3
After years of development, FPGAs are finally making an appearance on multi-tenant cloud servers. These heterogeneous FPGA-CPU architectures break common assumptions about isolatio…
TPM-FAIL: TPM meets Timing and Lattice Attacks
Daniel Moghimi, Berk Sunar, Thomas Eisenbarth +1
Trusted Platform Module (TPM) serves as a hardware-based root of trust that protects cryptographic keys from privileged system and physical adversaries. In this work, we perform a…
Differential privacy with partial knowledge
Damien Desfontaines, Esfandiar Mohammadi, Elisabeth Krahmer +1
Differential privacy offers formal quantitative guarantees for algorithms over datasets, but it assumes attackers that know and can influence all but one record in the database. Th…
RELOAD+REFRESH: Abusing Cache Replacement Policies to Perform Stealthy Cache Attacks
Samira Briongos, Pedro Malagón, José M. Moya +1
Caches have become the prime method for unintended information extraction across logical isolation boundaries. Even Spectre and Meltdown rely on the cache side channel, as it provi…
SPOILER: Speculative Load Hazards Boost Rowhammer and Cache Attacks
Saad Islam, Ahmad Moghimi, Ida Bruhns +4
Modern microarchitectures incorporate optimization techniques such as speculative loads and store forwarding to improve the memory bottleneck. The processor executes the load specu…