activity
20162026
most citedThe Cost of Application-Class Processing: Energy and Performance Analysis of a Linux-ready 1.7GHz 64bit RISC-V Core in 22nm FDSOI Technology

428 citations · 4.5k across the 191 of their papers we have counts for

collaborators
Showing 2023Show all

39 papers · 1 filter

cs.AR2023★ 8 cited

Scalable Hierarchical Instruction Cache for Ultra-Low-Power Processors Clusters

Jie Chen, Igor Loi, Eric Flamand +3

High Performance and Energy Efficiency are critical requirements for Internet of Things (IoT) end-nodes. Exploiting tightly-coupled clusters of programmable processors (CMPs) has r…

cs.AR2023

PATRONoC: Parallel AXI Transport Reducing Overhead for Networks-on-Chip targeting Multi-Accelerator DNN Platforms at the Edge

Vikram Jain, Matheus Cavalcante, Nazareno Bruschi +6

Emerging deep neural network (DNN) applications require high-performance multi-core hardware acceleration with large data bursts. Classical network-on-chips (NoCs) use serial packe…

cs.RO2023

Land & Localize: An Infrastructure-free and Scalable Nano-Drones Swarm with UWB-based Localization

Mahyar Pourjabar, Ahmed AlKatheeri, Manuele Rusci +5

Relative localization is a crucial functional block of any robotic swarm. We address it in a fleet of nano-drones characterized by a 10 cm-scale form factor, which makes them highl…

cs.DC2023★ 1 cited

Fast Shared-Memory Barrier Synchronization for a 1024-Cores RISC-V Many-Core Cluster

Marco Bertuletti, Samuel Riedel, Yichao Zhang +2

Synchronization is likely the most critical performance killer in shared-memory parallel programs. With the rise of multi-core and many-core processors, the relative impact on perf…

cs.CV2023★ 19 cited

Flexible and Fully Quantized Ultra-Lightweight TinyissimoYOLO for Ultra-Low-Power Edge Systems

Julian Moosmann, Hanna Mueller, Nicky Zimmerman +3

This paper deploys and explores variants of TinyissimoYOLO, a highly flexible and fully quantized ultra-lightweight object detection network designed for edge systems with a power…

cs.DC2023★ 23 cited

Design of an energy aware petaflops class high performance cluster based on power architecture

W. A. Ahmad, A. Bartolini, F. Beneventi +9

In this paper we present D.A.V.I.D.E. (Development for an Added Value Infrastructure Designed in Europe), an innovative and energy efficient High Performance Computing cluster desi…