activity
20162026
most citedThe Cost of Application-Class Processing: Energy and Performance Analysis of a Linux-ready 1.7GHz 64bit RISC-V Core in 22nm FDSOI Technology

428 citations · 4.5k across the 191 of their papers we have counts for

collaborators
Showing cs.DCShow all

24 papers · 1 filter

cs.DC2023★ 1 cited

Fast Shared-Memory Barrier Synchronization for a 1024-Cores RISC-V Many-Core Cluster

Marco Bertuletti, Samuel Riedel, Yichao Zhang +2

Synchronization is likely the most critical performance killer in shared-memory parallel programs. With the rise of multi-core and many-core processors, the relative impact on perf…

cs.DC2023★ 23 cited

Design of an energy aware petaflops class high performance cluster based on power architecture

W. A. Ahmad, A. Bartolini, F. Beneventi +9

In this paper we present D.A.V.I.D.E. (Development for an Added Value Infrastructure Designed in Europe), an innovative and energy efficient High Performance Computing cluster desi…

cs.DC2023★ 19 cited

Experimenting with Emerging RISC-V Systems for Decentralised Machine Learning

Gianluca Mittone, Nicolò Tonci, Robert Birke +10

Decentralised Machine Learning (DML) enables collaborative machine learning without centralised input data. Federated Learning (FL) and Edge Inference are examples of DML. While to…

cs.DC2022

End-to-End DNN Inference on a Massively Parallel Analog In Memory Computing Architecture

Nazareno Bruschi, Giuseppe Tagliavini, Angelo Garofalo +4

The demand for computation resources and energy efficiency of Convolutional Neural Networks (CNN) applications requires a new paradigm to overcome the "Memory Wall". Analog In-Memo…

cs.DC2022★ 1 cited

Efficient Parallelization of 5G-PUSCH on a Scalable RISC-V Many-core Processor

Marco Bertuletti, Yichao Zhang, Alessandro Vanelli-Coralli +1

5G Radio access network disaggregation and softwarization pose challenges in terms of computational performance to the processing units. At the physical layer level, the baseband p…

cs.DC2022★ 4 cited

Monte Cimone: Paving the Road for the First Generation of RISC-V High-Performance Computers

Andrea Bartolini, Federico Ficarelli, Emanuele Parisi +9

The new open and royalty-free RISC-V ISA is attracting interest across the whole computing continuum, from microcontrollers to supercomputers. High-performance RISC-V processors an…