12 citations · 27 across the 9 of their papers we have counts for
9 papers
Gate-Level Static Approximate Adders
P Balasubramanian, R Nayar, D L Maskell
This work compares and analyzes static approximate adders which are suitable for FPGA and ASIC type implementations. We consider many static approximate adders and evaluate their p…
Performance Comparison of Quasi-Delay-Insensitive Asynchronous Adders
P Balasubramanian
In this technical note, we provide a comparison of the design metrics of various quasi-delay-insensitive (QDI) asynchronous adders, where the adders correspond to diverse architect…
Performance Comparison of some Synchronous Adders
P Balasubramanian
This technical note compares the performance of some synchronous adders which correspond to the following architectures: i) ripple carry adder (RCA), ii) recursive carry lookahead…
Asynchronous Ripple Carry Adder based on Area Optimized Early Output Dual-Bit Full Adder
P Balasubramanian
This technical note presents the design of a new area optimized asynchronous early output dual-bit full adder (DBFA). An asynchronous ripple carry adder (RCA) is constructed based…
Comments on "Dual-rail asynchronous logic multi-level implementation"
P Balasubramanian
In this research communication, we comment on "Dual-rail asynchronous logic multi-level implementation" [Integration, the VLSI Journal 47 (2014) 148-159] by expounding the problema…
Approximate Early Output Asynchronous Adders Based on Dual-Rail Data Encoding and 4-Phase Return-to-Zero and Return-to-One Handshaking
P Balasubramanian
Approximate computing is emerging as an alternative to accurate computing due to its potential for realizing digital circuits and systems with low power dissipation, less critical…
Critique of "Asynchronous Logic Implementation Based on Factorized DIMS"
P Balasubramanian
This paper comments on "Asynchronous Logic Implementation Based on Factorized DIMS" [Journal of Circuits, Systems, and Computers, vol. 26, no. 5, 1750087: 1-9, May 2017] with respe…
Asynchronous Early Output Section-Carry Based Carry Lookahead Adder with Alias Carry Logic
P Balasubramanian, C Dang, D L Maskell +1
A new asynchronous early output section-carry based carry lookahead adder (SCBCLA) with alias carry output logic is presented in this paper. To evaluate the proposed SCBCLA with al…
Latency Optimized Asynchronous Early Output Ripple Carry Adder based on Delay-Insensitive Dual-Rail Data Encoding
P Balasubramanian, K Prasad
Asynchronous circuits employing delay-insensitive codes for data representation i.e. encoding and following a 4-phase return-to-zero protocol for handshaking are generally robust.…