5 citations · 7 across the 5 of their papers we have counts for
5 papers
HENNC: Hardware Engine for Artificial Neural Network-based Chaotic Oscillators
Mobin Vaziri, Shervin Vakili, M. Mehdi Rahimifar +1
This letter introduces a framework for the automatic generation of hardware cores for Artificial Neural Network (ANN)-based chaotic oscillators. The framework trains the model to a…
Fast and Low-Cost Approximate Multiplier for FPGAs using Dynamic Reconfiguration
Shervin Vakili, Mobin Vaziri, Amirhossein Zarei +1
Multipliers are widely-used arithmetic operators in digital signal processing and machine learning circuits. Due to their relatively high complexity, they can have high latency and…
SHIP: A Scalable High-performance IPv6 Lookup Algorithm that Exploits Prefix Characteristics
Thibaut Stimpfling, Normand Bélanger, J. M. Pierre Langlois +1
Due to the emergence of new network applications, current IP lookup engines must support high-bandwidth, low lookup latency and the ongoing growth of IPv6 networks. However, existi…
Memory Efficient Multi-Scale Line Detector Architecture for Retinal Blood Vessel Segmentation
Hamza Bendaoudi, Farida Cheriet, J. M. Pierre Langlois
This paper presents a memory efficient architecture that implements the Multi-Scale Line Detector (MSLD) algorithm for real-time retinal blood vessel detection in fundus images on…
Accurate and Efficient Hyperbolic Tangent Activation Function on FPGA using the DCT Interpolation Filter
Ahmed M. Abdelsalam, J. M. Pierre Langlois, F. Cheriet
Implementing an accurate and fast activation function with low cost is a crucial aspect to the implementation of Deep Neural Networks (DNNs) on FPGAs. We propose a high-accuracy ap…