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20162024
most citedP4-compatible High-level Synthesis of Low Latency 100 Gb/s Streaming Packet Parsers in FPGAs

37 citations · 44 across the 6 of their papers we have counts for

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2 papers · 1 filter

cs.CV2016★ 1 cited

Memory Efficient Multi-Scale Line Detector Architecture for Retinal Blood Vessel Segmentation

Hamza Bendaoudi, Farida Cheriet, J. M. Pierre Langlois

This paper presents a memory efficient architecture that implements the Multi-Scale Line Detector (MSLD) algorithm for real-time retinal blood vessel detection in fundus images on…

cs.NE2016★ 5 cited

Accurate and Efficient Hyperbolic Tangent Activation Function on FPGA using the DCT Interpolation Filter

Ahmed M. Abdelsalam, J. M. Pierre Langlois, F. Cheriet

Implementing an accurate and fast activation function with low cost is a crucial aspect to the implementation of Deep Neural Networks (DNNs) on FPGAs. We propose a high-accuracy ap…