37 citations · 44 across the 6 of their papers we have counts for
3 papers · 1 filter
HENNC: Hardware Engine for Artificial Neural Network-based Chaotic Oscillators
Mobin Vaziri, Shervin Vakili, M. Mehdi Rahimifar +1
This letter introduces a framework for the automatic generation of hardware cores for Artificial Neural Network (ANN)-based chaotic oscillators. The framework trains the model to a…
Fast and Low-Cost Approximate Multiplier for FPGAs using Dynamic Reconfiguration
Shervin Vakili, Mobin Vaziri, Amirhossein Zarei +1
Multipliers are widely-used arithmetic operators in digital signal processing and machine learning circuits. Due to their relatively high complexity, they can have high latency and…
P4-compatible High-level Synthesis of Low Latency 100 Gb/s Streaming Packet Parsers in FPGAs
Jeferson Santiago da Silva, François-Raymond Boyer, J. M. Pierre Langlois
Packet parsing is a key step in SDN-aware devices. Packet parsers in SDN networks need to be both reconfigurable and fast, to support the evolving network protocols and the increas…