6 citations · 25 across the 17 of their papers we have counts for
4 papers · 1 filter
Multi Core SSL/TLS Security Processor Architecture Prototype Design with automated Preferential Algorithm in FPGA
Rourab Paul, Amlan Chakrabarti, Ranjan Ghosh
In this paper a pipelined architecture of a high speed network security processor (NSP) for SSL,TLS protocol is implemented on a system on chip (SOC) where hardware information of…
Performance Evaluation of ECC in Single and Multi Processor Architectures on FPGA Based Embedded System
Sruti Agarwal, Sangeet Saha, Rourab Paul +1
Cryptographic algorithms are computationally costly and the challenge is more if we need to execute them in resource constrained embedded systems. Field Programmable Gate Arrays (F…
Fault Detection for RC4 Algorithm and its Implementation on FPGA Platform
Rourab Paul, Amlan Chakrabarti, Ranjan Ghosh
In hardware implementation of a cryptographic algorithm, one may achieve leakage of secret information by creating scopes to introduce controlled faulty bit(s) even though the algo…
Hardware Implementation of four byte per clock RC4 algorithm
Rourab Paul, Amlan Chakrabarti, Ranjan Ghosh
In the field of cryptography till date the 2-byte in 1-clock is the best known RC4 hardware design [1], while 1-byte in 1-clock [2], and the 1-byte in 3 clocks [3][4] are the best…