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cs.AR2026
A Process-Aware Hybrid Si/IGO Monolithic-3D 6T SRAM with BEOL Pass-Gates for the 2nm Node
Po-Chuan Wang, Dongwon Jang, Eknath Sarkar +5
We propose a monolithic-3D (M3D) 6T SRAM at the 2nm node, integrating BEOL IGO pass-gates (PGs) with an all-silicon nanosheet latch, buried power rails (BPRs), and Ru interconnects…
cs.AR2026
System-Technology Co-Optimization of Bitline Routing and Bonding Pathways in Monolithic 3D DRAM Architectures
Kiseok Lee, Sungwon Cho, Seongkwang Lim +2
3D DRAM has emerged as a promising approach for continued density scaling, but its viability is limited by routing and hybrid bonding constraints to periphery, which may degrade se…