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cond-mat.mes-hall2025
Design Optimization of Flip FET Standard Cells with Dual-sided Pins for Ultimate Scaling
Rui Gui, Haoran Lu, Jiacheng Sun +7
Recently, we proposed a novel transistor architecture for 3D stacked FETs called Flip FET (FFET), featuring N/P transistors back-to-back stacked and dual-sided interconnects. With…
cond-mat.mes-hall2024
From Flip FET to Flip 3D Integration (F3D): Maximizing the Scaling Potential of Wafer Both Sides Beyond Conventional 3D Integration
Heng Wu, Haoran Lu, Wanyue Peng +13
In this work, we proposed a new 3D integration technology: the Flip 3D integration (F3D), consisting of the 3D transistor stacking, the 3D dual-sided interconnects, the 3D die-to-d…