21 citations · 25 across the 18 of their papers we have counts for
11 papers · 1 filter
UniRTL: Unifying Code and Graph for Robust RTL Representation Learning
Yi Liu, Hongji Zhang, Lei Chen +2
Developing effective representations for register transfer level (RTL) designs is crucial for accelerating the hardware design workflow. Existing approaches, however, typically rel…
Context Distillation as Latent Memory Management
Ziyang Zheng, Zeju Li, Xiangyu Wen +5
Context distillation compresses contextual information into model parameters, yet existing methods often ignore how multiple distilled latent memories should be stored, retrieved,…
ELF: Efficient Logic Synthesis by Pruning Redundancy in Refactoring
Dimitris Tsaras, Xing Li, Lei Chen +2
In electronic design automation, logic optimization operators play a crucial role in minimizing the gate count of logic circuits. However, their computation demands are high. Opera…
Beyond Tokens: Enhancing RTL Quality Estimation via Structural Graph Learning
Yi Liu, Hongji Zhang, Yiwen Wang +4
Estimating the quality of register transfer level (RTL) designs is crucial in the electronic design automation (EDA) workflow, as it enables instant feedback on key performance met…
SpaceGNN: Multi-Space Graph Neural Network for Node Anomaly Detection with Extremely Limited Labels
Xiangyu Dong, Xingyi Zhang, Lei Chen +2
Node Anomaly Detection (NAD) has gained significant attention in the deep learning community due to its diverse applications in real-world scenarios. Existing NAD methods primarily…
MTLSO: A Multi-Task Learning Approach for Logic Synthesis Optimization
Faezeh Faez, Raika Karimi, Yingxue Zhang +4
Electronic Design Automation (EDA) is essential for IC design and has recently benefited from AI-based techniques to improve efficiency. Logic synthesis, a key EDA stage, transform…
SeaDAG: Semi-autoregressive Diffusion for Conditional Directed Acyclic Graph Generation
Xinyi Zhou, Xing Li, Yingzhao Lian +6
We introduce SeaDAG, a semi-autoregressive diffusion model for conditional generation of Directed Acyclic Graphs (DAGs). Considering their inherent layer-wise structure, we simulat…
ShortCircuit: AlphaZero-Driven Circuit Design
Dimitrios Tsaras, Antoine Grosnit, Lei Chen +3
Chip design relies heavily on generating Boolean circuits, such as AND-Inverter Graphs (AIGs), from functional descriptions like truth tables. This generation operation is a key pr…
SmoothGNN: Smoothing-aware GNN for Unsupervised Node Anomaly Detection
Xiangyu Dong, Xingyi Zhang, Yanni Sun +3
The smoothing issue in graph learning leads to indistinguishable node representations, posing significant challenges for graph-related tasks. However, our experiments reveal that t…
PreRoutGNN for Timing Prediction with Order Preserving Partition: Global Circuit Pre-training, Local Delay Learning and Attentional Cell Modeling
Ruizhe Zhong, Junjie Ye, Zhentao Tang +4
Pre-routing timing prediction has been recently studied for evaluating the quality of a candidate cell placement in chip design. It involves directly estimating the timing metrics…
Circuit Transformer: A Transformer That Preserves Logical Equivalence
Xihan Li, Xing Li, Lei Chen +3
Implementing Boolean functions with circuits consisting of logic gates is fundamental in digital computer design. However, the implemented circuit must be exactly equivalent, which…