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20152026
most citedAdvanced Fabrication Processes for Superconducting Very Large Scale Integrated Circuits

253 citations · 455 across the 11 of their papers we have counts for

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cond-mat.supr-con2026

Elimination of Flux Trapping in Superconducting Circuits in Ambient Magnetic Fields

Rohan T. Kapur, Alex Wynn, Sergey K. Tolpygo +10

Superconductor digital electronics and quantum computing with superconducting qubits are promising next-generation computing technologies. When cooled down or operated in the prese…

cond-mat.supr-con2026

Mitigation of Magnetic Flux Trapping in Superconducting Electronics Using Moats

Rohan T. Kapur, Sergey K. Tolpygo, Alex Wynn +7

Magnetic flux (vortex) trapping remains a major obstacle to very large scale integration in superconducting electronics. Moats -- etched regions in circuit layers placed in ground…

cond-mat.supr-con2023

Extremely Large Area (88 mm X 88 mm) Superconducting Integrated Circuit (ELASIC)

Rabindra N. Das, Vladimir Bolkhovsky, Alex Wynn +9

Superconducting integrated circuit (SIC) is a promising "beyond-CMOS" device technology enables speed-of-light, nearly lossless communications to advance cryogenic (4 K or lower) c…

cond-mat.supr-con2021★ 14 cited

Wafer-Scale Characterization of a Superconductor Integrated Circuit Fabrication Process, Using a Cryogenic Wafer Prober

Joshua T. West, Arthur Kurlej, Alex Wynn +3

Using a fully automated cryogenic wafer prober, we measured superconductor fabrication process control monitors and simple integrated circuits on 200 mm wafers at 4.4 K, including…

cond-mat.supr-con2019★ 29 cited

Planarized Fabrication Process With Two Layers of SIS Josephson Junctions and Integration of SIS and SFS π-Junctions

Sergey K. Tolpygo, Vladimir Bolkhovsky, Ravi Rastogi +6

We present our new fabrication Process for Superconductor Electronics (PSE2) that integrates two (2) layers of Josephson junctions in a fully planarized multilayer process on 200-m…

cond-mat.supr-con2018★ 57 cited

Superconductor Electronics Fabrication Process with MoN Kinetic Inductors and Self-Shunted Josephson Junctions

Sergey K. Tolpygo, Vladimir Bolkhovsky, D. E. Oates +6

Recent progress in superconductor electronics fabrication has enabled single-flux-quantum (SFQ) digital circuits with close to one million Josephson junctions (JJs) on 1-cm chi…

cond-mat.supr-con2017★ 15 cited

Developments Toward a 250-nm, Fully Planarized Fabrication Process With Ten Superconducting Layers And Self-Shunted Josephson Junctions

Sergey K. Tolpygo, Vladimir Bolkhovsky, Ravi Rastogi +5

We are developing a superconductor electronics fabrication process with up to nine planarized superconducting layers, stackable stud vias, self-shunted Nb/AlOx-Al/Nb Josephson junc…

cond-mat.supr-con2016★ 84 cited

Properties of Unshunted and Resistively Shunted Nb/AlOx-Al/Nb Josephson Junctions With Critical Current Densities from 0.1 mA/μm^2 to 1 mA/μm^2

Sergey K. Tolpygo, Vladimir Bolkhovsky, Scott Zarr +5

We investigated current-voltage characteristics of unshunted and externally shunted Josephson junctions (JJs) with high critical current densities, Jc, in order to extract their ba…

cond-mat.supr-con2015★ 253 cited

Advanced Fabrication Processes for Superconducting Very Large Scale Integrated Circuits

Sergey K. Tolpygo, Vladimir Bolkhovsky, T. J. Weir +4

We review the salient features of two advanced nodes of an 8-Nb-layer fully planarized process developed recently at MIT Lincoln Laboratory for fabricating Single Flux Quantum(SFQ)…