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cs.CR2025
Logic Solver Guided Directed Fuzzing for Hardware Designs
Raghul Saravanan, Sai Manoj P D
The ever-increasing complexity of design specifications for processors and intellectual property (IP) presents a formidable challenge for early bug detection in the modern IC desig…
cs.CR2025
Accelerating Hardware Verification with Graph Models
Raghul Saravanan, Sreenitha Kasarapu, Sai Manoj Pudukotai Dinakarrao
The increasing complexity of modern processor and IP designs presents significant challenges in identifying and mitigating hardware flaws early in the IC design cycle. Traditional…