16 citations · 36 across the 18 of their papers we have counts for
3 papers · 1 filter
Logic Solver Guided Directed Fuzzing for Hardware Designs
Raghul Saravanan, Sai Manoj P D
The ever-increasing complexity of design specifications for processors and intellectual property (IP) presents a formidable challenge for early bug detection in the modern IC desig…
Bit-Flip Fault Attack: Crushing Graph Neural Networks via Gradual Bit Search
Sanaz Kazemi Abharian, Sai Manoj Pudukotai Dinakarrao
Graph Neural Networks (GNNs) have emerged as a powerful machine learning method for graph-structured data. A plethora of hardware accelerators has been introduced to meet the perfo…
Accelerating Hardware Verification with Graph Models
Raghul Saravanan, Sreenitha Kasarapu, Sai Manoj Pudukotai Dinakarrao
The increasing complexity of modern processor and IP designs presents significant challenges in identifying and mitigating hardware flaws early in the IC design cycle. Traditional…