124 citations · 388 across the 53 of their papers we have counts for
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Enabling Efficient and Scalable DRAM Read Disturbance Mitigation via New Experimental Insights into Modern DRAM Chips
Abdullah Giray Yağlıkçı
Increasing storage density exacerbates DRAM read disturbance, a circuit-level vulnerability exploited by system-level attacks. Unfortunately, existing defenses are either ineffecti…
An Experimental Characterization of Combined RowHammer and RowPress Read Disturbance in Modern DRAM Chips
Haocong Luo, Ismail Emir Yüksel, Ataberk Olgun +3
DRAM read disturbance can break memory isolation, a fundamental property to ensure system robustness (i.e., reliability, security, safety). RowHammer and RowPress are two different…
Understanding the Security Benefits and Overheads of Emerging Industry Solutions to DRAM Read Disturbance
Oğuzhan Canpolat, A. Giray Yağlıkçı, Geraldo F. Oliveira +3
We present the first rigorous security, performance, energy, and cost analyses of the state-of-the-art on-DRAM-die read disturbance mitigation method, Per Row Activation Counting (…
RowPress Vulnerability in Modern DRAM Chips
Haocong Luo, Ataberk Olgun, A. Giray Yağlıkçı +6
Memory isolation is a critical property for system reliability, security, and safety. We demonstrate RowPress, a DRAM read disturbance phenomenon different from the well-known RowH…
Simultaneous Many-Row Activation in Off-the-Shelf DRAM Chips: Experimental Characterization and Analysis
Ismail Emir Yuksel, Yahya Can Tugrul, F. Nisa Bostanci +8
We experimentally analyze the computational capability of commercial off-the-shelf (COTS) DRAM chips and the robustness of these capabilities under various timing delays between DR…
BreakHammer: Enhancing RowHammer Mitigations by Carefully Throttling Suspect Threads
Oğuzhan Canpolat, A. Giray Yağlıkçı, Ataberk Olgun +5
RowHammer is a major read disturbance mechanism in DRAM where repeatedly accessing (hammering) a row of DRAM cells (DRAM row) induces bitflips in other physically nearby DRAM rows.…
Revisiting Main Memory-Based Covert and Side Channel Attacks in the Context of Processing-in-Memory
F. Nisa Bostanci, Konstantinos Kanellopoulos, Ataberk Olgun +6
We introduce IMPACT, a set of high-throughput main memory-based timing attacks that leverage characteristics of processing-in-memory (PiM) architectures to establish covert and sid…
MIMDRAM: An End-to-End Processing-Using-DRAM System for High-Throughput, Energy-Efficient and Programmer-Transparent Multiple-Instruction Multiple-Data Processing
Geraldo F. Oliveira, Ataberk Olgun, Abdullah Giray Yağlıkçı +4
Processing-using-DRAM (PUD) is a processing-in-memory (PIM) approach that uses a DRAM array's massive internal parallelism to execute very-wide data-parallel operations, in a singl…
CoMeT: Count-Min-Sketch-based Row Tracking to Mitigate RowHammer at Low Cost
F. Nisa Bostanci, Ismail Emir Yuksel, Ataberk Olgun +5
We propose a new RowHammer mitigation mechanism, CoMeT, that prevents RowHammer bitflips with low area, performance, and energy costs in DRAM-based systems at very low RowHammer th…
Spatial Variation-Aware Read Disturbance Defenses: Experimental Analysis of Real DRAM Chips and Implications on Future Solutions
Abdullah Giray Yağlıkçı, Yahya Can Tuğrul, Geraldo F. Oliveira +4
Read disturbance in modern DRAM chips is a widespread phenomenon and is reliably used for breaking memory isolation, a fundamental building block for building robust systems. RowHa…
Functionally-Complete Boolean Logic in Real DRAM Chips: Experimental Characterization and Analysis
Ismail Emir Yuksel, Yahya Can Tugrul, Ataberk Olgun +7
Processing-using-DRAM (PuD) is an emerging paradigm that leverages the analog operational properties of DRAM circuitry to enable massively parallel in-DRAM computation. PuD has the…