activity
20172026
most citedBlockHammer: Preventing RowHammer at Low Cost by Blacklisting Rapidly-Accessed DRAM Rows

124 citations · 388 across the 53 of their papers we have counts for

collaborators
Showing 2022Show all

9 papers · 1 filter

cs.AR2022★ 2 cited

TuRaN: True Random Number Generation Using Supply Voltage Underscaling in SRAMs

İsmail Emir Yüksel, Ataberk Olgun, Behzad Salami +6

Prior works propose SRAM-based TRNGs that extract entropy from SRAM arrays. SRAM arrays are widely used in a majority of specialized or general-purpose chips that perform the compu…

cs.CR2022★ 53 cited

Fundamentally Understanding and Solving RowHammer

Onur Mutlu, Ataberk Olgun, A. Giray Yağlıkçı

We provide an overview of recent developments and future directions in the RowHammer vulnerability that plagues modern DRAM (Dynamic Random Memory Access) chips, which are used in…

cs.AR2022

DRAM Bender: An Extensible and Versatile FPGA-based Infrastructure to Easily Test State-of-the-art DRAM Chips

Ataberk Olgun, Hasan Hassan, A. Giray Yağlıkçı +6

To understand and improve DRAM performance, reliability, security and energy efficiency, prior works study characteristics of commodity DRAM chips. Unfortunately, state-of-the-art…

cs.CR2022★ 13 cited

SpyHammer: Understanding and Exploiting RowHammer under Fine-Grained Temperature Variations

Lois Orosa, Ulrich Rührmair, A. Giray Yaglikci +7

RowHammer is a DRAM vulnerability that can cause bit errors in a victim DRAM row solely by accessing its neighboring DRAM rows at a high-enough rate. Recent studies demonstrate tha…

cs.AR2022★ 5 cited

HiRA: Hidden Row Activation for Reducing Refresh Latency of Off-the-Shelf DRAM Chips

Abdullah Giray Yağlıkçı, Ataberk Olgun, Minesh Patel +5

DRAM is the building block of modern main memory systems. DRAM cells must be periodically refreshed to prevent data loss. Refresh operations degrade system performance by interferi…

cs.AR2022★ 2 cited

Self-Managing DRAM: A Low-Cost Framework for Enabling Autonomous and Efficient in-DRAM Operations

Hasan Hassan, Ataberk Olgun, A. Giray Yaglikci +2

The memory controller is in charge of managing DRAM maintenance operations (e.g., refresh, RowHammer protection, memory scrubbing) to reliably operate modern DRAM chips. Implementi…

cs.AR2022★ 6 cited

Understanding RowHammer Under Reduced Wordline Voltage: An Experimental Study Using Real DRAM Devices

A. Giray Yağlıkçı, Haocong Luo, Geraldo F. de Oliviera +7

RowHammer is a circuit-level DRAM vulnerability, where repeatedly activating and precharging a DRAM row, and thus alternating the voltage of a row's wordline between low and high v…

cs.AR2022★ 6 cited

A Case for Transparent Reliability in DRAM Systems

Minesh Patel, Taha Shahroodi, Aditya Manglik +4

Today's systems have diverse needs that are difficult to address using one-size-fits-all commodity DRAM. Unfortunately, although system designers can theoretically adapt commodity…

cs.AR2022

DR-STRaNGe: End-to-End System Design for DRAM-based True Random Number Generators

F. Nisa Bostancı, Ataberk Olgun, Lois Orosa +5

Random number generation is an important task in a wide variety of critical applications including cryptographic algorithms, scientific simulations, and industrial testing tools. T…