124 citations · 388 across the 53 of their papers we have counts for
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Revisiting RowHammer: An Experimental Analysis of Modern DRAM Devices and Mitigation Techniques
Jeremie S. Kim, Minesh Patel, A. Giray Yaglikci +4
In order to shed more light on how RowHammer affects modern and future devices at the circuit-level, we first present an experimental characterization of RowHammer on 1580 DRAM chi…
CLR-DRAM: A Low-Cost DRAM Architecture Enabling Dynamic Capacity-Latency Trade-Off
Haocong Luo, Taha Shahroodi, Hasan Hassan +5
DRAM is the prevalent main memory technology, but its long access latency can limit the performance of many workloads. Although prior works provide DRAM designs that reduce DRAM ac…
SysScale: Exploiting Multi-domain Dynamic Voltage and Frequency Scaling for Energy Efficient Mobile Processors
Jawad Haj-Yahya, Mohammed Alser, Jeremie Kim +4
There are three domains in a modern thermally-constrained mobile system-on-chip (SoC): compute, IO, and memory. We observe that a modern SoC typically allocates a fixed power budge…