Neuromorphic Intermediate Representation: A Unified Instruction Set for Interoperable Brain-Inspired Computing
arXiv:2311.14641 · doi:10.1038/s41467-024-52259-9
Abstract
Spiking neural networks and neuromorphic hardware platforms that simulate neuronal dynamics are getting wide attention and are being applied to many relevant problems using Machine Learning. Despite a well-established mathematical foundation for neural dynamics, there exists numerous software and hardware solutions and stacks whose variability makes it difficult to reproduce findings. Here, we establish a common reference frame for computations in digital neuromorphic systems, titled Neuromorphic Intermediate Representation (NIR). NIR defines a set of computational and composable model primitives as hybrid systems combining continuous-time dynamics and discrete events. By abstracting away assumptions around discretization and hardware constraints, NIR faithfully captures the computational model, while bridging differences between the evaluated implementation and the underlying mathematical formalism. NIR supports an unprecedented number of neuromorphic systems, which we demonstrate by reproducing three spiking neural network models of different complexity across 7 neuromorphic simulators and 4 digital hardware platforms. NIR decouples the development of neuromorphic hardware and software, enabling interoperability between platforms and improving accessibility to multiple neuromorphic technologies. We believe that NIR is a key next step in brain-inspired hardware-software co-evolution, enabling research towards the implementation of energy efficient computational principles of nervous systems. NIR is available at neuroir.org
NIR is available at https://neuroir.org
References in corpus (11)
- PyTorch: An Imperative Style, High-Performance Deep Learning Library
- A scalable multi-core architecture with heterogeneous memory structures for Dynamic Neuromorphic Asynchronous Processors (DYNAPs)
- ReckOn: A 28nm Sub-mm2 Task-Agnostic Spiking Recurrent Neural Network Processor Enabling On-Chip Learning over Second-Long Timescales
- MLIR: A Compiler Infrastructure for the End of Moore's Law
- Arbor -- a morphologically-detailed neural network simulation library for contemporary high-performance computing architectures
- SpiNNaker 2: A 10 Million Core Processor System for Brain Simulation and Machine Learning
- Compiling Spiking Neural Networks to Neuromorphic Hardware
- Sub-mW Neuromorphic SNN audio processing applications with Rockpool and Xylo
- Neuromorphic hardware for sustainable AI data centers
- Ivy: Templated Deep Learning for Inter-Framework Portability
- Spyx: A Library for Just-In-Time Compiled Optimization of Spiking Neural Networks
Cited by in corpus (4)
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- Distributed Representations Enable Robust Multi-Timescale Symbolic Computation in Neuromorphic Hardware
- Wandering around: A bioinspired approach to visual attention through object motion sensitivity
- Heterogeneous SoC Integrating an Open-Source Recurrent SNN Accelerator for Neuromorphic Edge Computing on FPGA