Mixed-precision deep learning based on computational memory

Abstract

Deep neural networks (DNNs) have revolutionized the field of artificial intelligence and have achieved unprecedented success in cognitive tasks such as image and speech recognition. Training of large DNNs, however, is computationally intensive and this has motivated the search for novel computing architectures targeting this application. A computational memory unit with nanoscale resistive memory devices organized in crossbar arrays could store the synaptic weights in their conductance states and perform the expensive weighted summations in place in a non-von Neumann manner. However, updating the conductance states in a reliable manner during the weight update process is a fundamental challenge that limits the training accuracy of such an implementation. Here, we propose a mixed-precision architecture that combines a computational memory unit performing the weighted summations and imprecise conductance updates with a digital processing unit that accumulates the weight updates in high precision. A combined hardware/software training experiment of a multilayer perceptron based on the proposed architecture using a phase-change memory (PCM) array achieves 97.73% test accuracy on the task of classifying handwritten digits (based on the MNIST dataset), within 0.6% of the software baseline. The architecture is further evaluated using accurate behavioral models of PCM on a wide class of networks, namely convolutional neural networks, long-short-term-memory networks, and generative-adversarial networks. Accuracies comparable to those of floating-point implementations are achieved without being constrained by the non-idealities associated with the PCM devices. A system-level study demonstrates 173x improvement in energy efficiency of the architecture when used for training a multilayer perceptron compared with a dedicated fully digital 32-bit implementation.

References in corpus (26)

• Adam: A Method for Stochastic Optimization
• GANs Trained by a Two Time-Scale Update Rule Converge to a Local Nash Equilibrium
• Training and Operation of an Integrated Neuromorphic Network Based on Metal-Oxide Memristors
• Recurrent Neural Network Regularization
• BinaryConnect: Training Deep Neural Networks with binary weights during propagations
• Quantized Neural Networks: Training Neural Networks with Low Precision Weights and Activations
• Deep Learning with Limited Numerical Precision
• Mixed Precision Training
• Neuromorphic computing with multi-memristive synapses
• Deep Learning using Linear Support Vector Machines
• Acceleration of Deep Neural Network Training with Resistive Cross-Point Devices
• Mixed-Precision In-Memory Computing
• Accurate deep neural network inference using computational phase-change memory
• Long short-term memory networks in memristor crossbars
• Training and Inference with Integers in Deep Neural Networks
• Temporal correlation detection using computational phase-change memory
• Multiscale Co-Design Analysis of Energy, Latency, Area, and Accuracy of a ReRAM Analog Neural Training Accelerator
• Neural Networks with Few Multiplications
• An Analysis of Neural Language Modeling at Multiple Scales
• Are GANs Created Equal? A Large-Scale Study
• Deep neural networks are robust to weight binarization and other non-linear distortions
• Buddy-RAM: Improving the Performance and Efficiency of Bulk Bitwise Operations Using DRAM
• Training LSTM Networks with Resistive Cross-Point Devices
• Analog CMOS-based Resistive Processing Unit for Deep Neural Network Training
• An Improved Evaluation Framework for Generative Adversarial Networks
• Bridging the Accuracy Gap for 2-bit Quantized Neural Networks (QNN)

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• The Backpropagation Algorithm Implemented on Spiking Neuromorphic Hardware
• Fast offset corrected in-memory training
• Energy Efficient Learning with Low Resolution Stochastic Domain Wall Synapse Based Deep Neural Networks
• Energy Efficient In-memory Hyperdimensional Encoding for Spatio-temporal Signal Processing
• Stateful Logic using Phase Change Memory
• ALPINE: Analog In-Memory Acceleration with Tight Processor Integration for Deep Learning
• Efficient Training of the Memristive Deep Belief Net Immune to Non-Idealities of the Synaptic Devices
• AnalogVNN: A fully modular framework for modeling and optimizing photonic neural networks
• Binary stochasticity enabled highly efficient neuromorphic deep learning achieves better-than-software accuracy
• End-to-end 100-TOPS/W Inference With Analog In-Memory Computing: Are We There Yet?
• Quantized Non-Volatile Nanomagnetic Synapse based Autoencoder for Efficient Unsupervised Network Anomaly Detection
• Synaptic metaplasticity with multi-level memristive devices
• Leveraging Mixed Precision in Exponential Time Integration Methods
• Neural Network Training on In-memory-computing Hardware with Radix-4 Gradients
• Network insensitivity to parameter noise via adversarial regularization
• Scaling of hardware-compatible perturbative training algorithms
• On-Chip Error-triggered Learning of Multi-layer Memristive Spiking Neural Networks
• 2022 Roadmap on Neuromorphic Computing and Engineering