898 citations · 3.4k across the 38 of their papers we have counts for
41 papers
Using the IBM Analog In-Memory Hardware Acceleration Kit for Neural Network Training and Inference
Manuel Le Gallo, Corey Lammie, Julian Buechel +8
Analog In-Memory Computing (AIMC) is a promising approach to reduce the latency and energy consumption of Deep Neural Network (DNN) inference and training. However, the noisy and n…
Gradient descent-based programming of analog in-memory computing cores
Julian Büchel, Athanasios Vasilopoulos, Benedikt Kersting +11
The precise programming of crossbar arrays of unit-cells is crucial for obtaining high matrix-vector-multiplication (MVM) accuracy in analog in-memory computing (AIMC) cores. We pr…
AnalogNAS: A Neural Network Design Framework for Accurate Inference with Analog In-Memory Computing
Hadjer Benmeziane, Corey Lammie, Irem Boybat +9
The advancement of Deep Learning (DL) is driven by efficient Deep Neural Network (DNN) design and new hardware accelerators. Current DNN design is primarily tailored for general-pu…
Hardware-aware training for large-scale and diverse deep learning inference workloads using in-memory computing-based accelerators
Malte J. Rasch, Charles Mackin, Manuel Le Gallo +10
Analog in-memory computing (AIMC) -- a promising approach for energy-efficient acceleration of deep learning workloads -- computes matrix-vector multiplications (MVMs) but only app…
WHYPE: A Scale-Out Architecture with Wireless Over-the-Air Majority for Scalable In-memory Hyperdimensional Computing
Robert Guirado, Abbas Rahimi, Geethan Karunaratne +3
Hyperdimensional computing (HDC) is an emerging computing paradigm that represents, manipulates, and communicates data using long random vectors known as hypervectors. Among differ…
A 64-core mixed-signal in-memory compute chip based on phase-change memory for deep neural network inference
Manuel Le Gallo, Riduan Khaddam-Aljameh, Milos Stanisavljevic +26
The need to repeatedly shuttle around synaptic weight values from memory to processing units has been a key source of energy inefficiency associated with hardware implementation of…