Fabrication and Electrical Characterization of Fully CMOS Si Single Electron Devices

Abstract

We present electrical data of silicon single electron devices fabricated with CMOS techniques and protocols. The easily tuned devices show clean Coulomb diamonds at T = 30 mK and charge offset drift of 0.01 e over eight days. In addition, the devices exhibit robust transistor characteristics including uniformity within about 0.5 V in the threshold voltage, gate resistances greater than 10 GΩ, and immunity to dielectric breakdown in electric fields as high as 4 MV/cm. These results highlight the benefits in device performance of a fully CMOS process for single electron device fabrication.

7 pages, 7 figures

References in corpus (3)

• Electron spin decoherence in isotope-enriched silicon
• Single-shot measurement of triplet-singlet relaxation in a Si/SiGe double quantum dot
• Intrinsic and doped coupled quantum dots created by local modulation of implantation in a silicon nanowire

Cited by in corpus (4)

• Machine Learning techniques for state recognition and auto-tuning in quantum dots
• Charge Offset Stability in Si Single Electron Devices with Al Gates
• Valley blockade in a silicon double quantum dot
• Silicon charge pump operation limit above and below liquid helium temperature